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Searched refs:write_aux_reg (Results 1 – 18 of 18) sorted by relevance

/Linux-v5.4/arch/arc/mm/
Dtlb.c112 write_aux_reg(ARC_REG_TLBPD1, 0); in __tlb_entry_erase()
115 write_aux_reg(ARC_REG_TLBPD1HI, 0); in __tlb_entry_erase()
117 write_aux_reg(ARC_REG_TLBPD0, 0); in __tlb_entry_erase()
118 write_aux_reg(ARC_REG_TLBCOMMAND, TLBWrite); in __tlb_entry_erase()
127 write_aux_reg(ARC_REG_TLBPD0, vaddr_n_asid); in tlb_entry_lkup()
129 write_aux_reg(ARC_REG_TLBCOMMAND, TLBProbe); in tlb_entry_lkup()
182 write_aux_reg(ARC_REG_TLBINDEX, 0xa); in utlb_invalidate()
185 write_aux_reg(ARC_REG_TLBCOMMAND, TLBIVUTLB); in utlb_invalidate()
207 write_aux_reg(ARC_REG_TLBCOMMAND, TLBGetIndex); in tlb_entry_insert()
210 write_aux_reg(ARC_REG_TLBPD1, pd1); in tlb_entry_insert()
[all …]
Dcache.c281 write_aux_reg(aux_cmd, paddr); in __cache_line_loop_v2()
327 write_aux_reg(aux_tag, paddr); in __cache_line_loop_v3()
337 write_aux_reg(ARC_REG_IC_PTAG_HI, (u64)paddr >> 32); in __cache_line_loop_v3()
341 write_aux_reg(aux_tag, paddr); in __cache_line_loop_v3()
345 write_aux_reg(aux_cmd, vaddr); in __cache_line_loop_v3()
403 write_aux_reg(ARC_REG_IC_PTAG_HI, (u64)paddr >> 32); in __cache_line_loop_v4()
405 write_aux_reg(ARC_REG_DC_PTAG_HI, (u64)paddr >> 32); in __cache_line_loop_v4()
409 write_aux_reg(aux_cmd, paddr); in __cache_line_loop_v4()
449 write_aux_reg(ARC_REG_IC_PTAG_HI, (u64)paddr >> 32); in __cache_line_loop_v4()
451 write_aux_reg(ARC_REG_DC_PTAG_HI, (u64)paddr >> 32); in __cache_line_loop_v4()
[all …]
/Linux-v5.4/arch/arc/kernel/
Dintc-arcv2.c80 write_aux_reg(AUX_IRQ_SELECT, i); in arc_init_IRQ()
81 write_aux_reg(AUX_IRQ_PRIORITY, ARCV2_IRQ_DEF_PRIO); in arc_init_IRQ()
89 write_aux_reg(AUX_IRQ_ENABLE, 0); in arc_init_IRQ()
101 write_aux_reg(AUX_IRQ_SELECT, data->hwirq); in arcv2_irq_mask()
102 write_aux_reg(AUX_IRQ_ENABLE, 0); in arcv2_irq_mask()
107 write_aux_reg(AUX_IRQ_SELECT, data->hwirq); in arcv2_irq_unmask()
108 write_aux_reg(AUX_IRQ_ENABLE, 1); in arcv2_irq_unmask()
114 write_aux_reg(AUX_IRQ_SELECT, data->hwirq); in arcv2_irq_enable()
115 write_aux_reg(AUX_IRQ_PRIORITY, ARCV2_IRQ_DEF_PRIO); in arcv2_irq_enable()
122 write_aux_reg(AUX_IRQ_ENABLE, 1); in arcv2_irq_enable()
Dperf_event.c109 write_aux_reg(ARC_REG_PCT_INDEX, idx); in arc_pmu_read_counter()
111 write_aux_reg(ARC_REG_PCT_CONTROL, tmp | ARC_REG_PCT_CONTROL_SN); in arc_pmu_read_counter()
232 write_aux_reg(ARC_REG_PCT_CONTROL, (tmp & 0xffff0000) | 0x1); in arc_pmu_enable()
240 write_aux_reg(ARC_REG_PCT_CONTROL, (tmp & 0xffff0000) | 0x0); in arc_pmu_disable()
273 write_aux_reg(ARC_REG_PCT_INDEX, idx); in arc_pmu_event_set_period()
276 write_aux_reg(ARC_REG_PCT_COUNTL, lower_32_bits(value)); in arc_pmu_event_set_period()
277 write_aux_reg(ARC_REG_PCT_COUNTH, upper_32_bits(value)); in arc_pmu_event_set_period()
306 write_aux_reg(ARC_REG_PCT_INT_CTRL, in arc_pmu_start()
310 write_aux_reg(ARC_REG_PCT_INDEX, idx); /* counter # */ in arc_pmu_start()
311 write_aux_reg(ARC_REG_PCT_CONFIG, hwc->config); /* condition */ in arc_pmu_start()
[all …]
Dintc-compact.c35 write_aux_reg(AUX_IRQ_LEV, level_mask); in arc_init_IRQ()
49 write_aux_reg(AUX_IENABLE, ienb); in arc_init_IRQ()
70 write_aux_reg(AUX_IENABLE, ienb); in arc_irq_mask()
79 write_aux_reg(AUX_IENABLE, ienb); in arc_irq_unmask()
/Linux-v5.4/drivers/clocksource/
Dtimer-nps.c149 write_aux_reg(NPS_REG_TIMER0_TSI, enabled_threads); in nps_clkevent_rm_thread()
153 write_aux_reg(NPS_REG_TIMER0_CTRL, TIMER0_CTRL_NH); in nps_clkevent_rm_thread()
155 write_aux_reg(NPS_REG_TIMER0_CTRL, in nps_clkevent_rm_thread()
172 write_aux_reg(NPS_REG_TIMER0_TSI, enabled_threads); in nps_clkevent_add_thread()
175 write_aux_reg(NPS_REG_TIMER0_LIMIT, delta); in nps_clkevent_add_thread()
176 write_aux_reg(NPS_REG_TIMER0_CNT, 0); in nps_clkevent_add_thread()
177 write_aux_reg(NPS_REG_TIMER0_CTRL, in nps_clkevent_add_thread()
Darc_timer.c182 write_aux_reg(AUX_RTC_CTRL, 1); in arc_cs_setup_rtc()
226 write_aux_reg(ARC_REG_TIMER1_LIMIT, ARC_TIMERN_MAX); in arc_cs_setup_timer1()
227 write_aux_reg(ARC_REG_TIMER1_CNT, 0); in arc_cs_setup_timer1()
228 write_aux_reg(ARC_REG_TIMER1_CTRL, TIMER_CTRL_NH); in arc_cs_setup_timer1()
245 write_aux_reg(ARC_REG_TIMER0_LIMIT, cycles); in arc_timer_event_setup()
246 write_aux_reg(ARC_REG_TIMER0_CNT, 0); /* start from 0 */ in arc_timer_event_setup()
248 write_aux_reg(ARC_REG_TIMER0_CTRL, TIMER_CTRL_IE | TIMER_CTRL_NH); in arc_timer_event_setup()
297 write_aux_reg(ARC_REG_TIMER0_CTRL, irq_reenable | TIMER_CTRL_NH); in timer_irq_handler()
/Linux-v5.4/drivers/irqchip/
Dirq-eznps.c63 write_aux_reg(AUX_IENABLE, ienb); in nps400_irq_mask()
73 write_aux_reg(AUX_IENABLE, ienb); in nps400_irq_unmask()
80 write_aux_reg(CTOP_AUX_IACK, 1 << irq); in nps400_irq_eoi_global()
92 write_aux_reg(CTOP_AUX_IACK, 1 << irq); in nps400_irq_ack()
/Linux-v5.4/include/soc/arc/
Daux.h14 #define write_aux_reg(r, v) __builtin_arc_sr((unsigned int)(v), r) macro
27 static inline void write_aux_reg(u32 r, u32 v) in write_aux_reg() function
51 write_aux_reg(reg, tmp); \
Dmcip.h119 write_aux_reg(ARC_REG_MCIP_WDATA, data); in __mcip_cmd_data()
/Linux-v5.4/arch/arc/include/asm/
Dirqflags-arcv2.h83 write_aux_reg(AUX_IRQ_ACT, irqact & ~0xffff); in arch_local_irq_enable()
134 write_aux_reg(AUX_IRQ_HINT, irq); in arc_softirq_trigger()
139 write_aux_reg(AUX_IRQ_HINT, 0); in arc_softirq_clear()
Dmmu_context.h96 write_aux_reg(ARC_REG_PID, hw_pid(mm, cpu) | MMU_ENABLE); in get_new_mmu_context()
149 write_aux_reg(ARC_REG_SCRATCH_DATA0, next->pgd); in switch_mm()
Dcmpxchg.h74 write_aux_reg(CTOP_AUX_GPA1, expected); in __cmpxchg()
/Linux-v5.4/arch/arc/plat-eznps/
Dctop.c17 write_aux_reg(CTOP_AUX_EFLAGS, next_task_dp->eflags); in dp_save_restore()
20 write_aux_reg(CTOP_AUX_GPA1, next_task_dp->gpa1); in dp_save_restore()
Dmtm.c45 write_aux_reg(CTOP_AUX_UDMC, udmc.value); in mtm_init_nat()
115 write_aux_reg(CTOP_AUX_DPC, dpc.value); in mtm_enable_core()
138 write_aux_reg(CTOP_AUX_MT_CTRL, mt_ctrl.value); in mtm_enable_core()
Dsmp.c66 write_aux_reg(CTOP_AUX_HW_COMPLY, hw_comply.value); in eznps_init_core()
70 write_aux_reg(CTOP_AUX_LPC, lpc.value); in eznps_init_core()
/Linux-v5.4/arch/arc/plat-hsdk/
Dplatform.c27 write_aux_reg(ARC_REG_AUX_ICCM, ARC_CCM_UNUSED_ADDR); in hsdk_init_per_cpu()
34 write_aux_reg(ARC_REG_AUX_DCCM, ARC_CCM_UNUSED_ADDR); in hsdk_init_per_cpu()
/Linux-v5.4/include/soc/nps/
Dcommon.h62 #define write_aux_reg(r, v) macro