| /Linux-v5.4/sound/pci/emu10k1/ |
| D | emu10k1.c | 93 struct snd_seq_device *wave = NULL; in snd_card_emu10k1_probe() local
155 sizeof(struct snd_emu10k1_synth_arg), &wave) < 0 || in snd_card_emu10k1_probe()
156 wave == NULL) { in snd_card_emu10k1_probe()
161 arg = SNDRV_SEQ_DEVICE_ARGPTR(wave); in snd_card_emu10k1_probe()
162 strcpy(wave->name, "Emu-10k1 Synth"); in snd_card_emu10k1_probe()
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| /Linux-v5.4/sound/pci/ |
| D | ad1889.c | 91 struct ad1889_register_state wave; member
191 chip->wave.reg = reg; in ad1889_channel_reset()
373 chip->wave.size = size; in snd_ad1889_playback_prepare()
374 chip->wave.reg = reg; in snd_ad1889_playback_prepare()
375 chip->wave.addr = rt->dma_addr; in snd_ad1889_playback_prepare()
377 ad1889_writew(chip, AD_DS_WSMC, chip->wave.reg); in snd_ad1889_playback_prepare()
383 ad1889_load_wave_buffer_address(chip, chip->wave.addr); in snd_ad1889_playback_prepare()
394 chip->wave.addr, count, size, reg, rt->rate); in snd_ad1889_playback_prepare()
475 chip->wave.reg = wsmc; in snd_ad1889_playback_trigger()
531 if (unlikely(!(chip->wave.reg & AD_DS_WSMC_WAEN))) in snd_ad1889_playback_pointer()
[all …]
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| /Linux-v5.4/Documentation/devicetree/bindings/rtc/ |
| D | maxim,ds3231.txt | 14 - 0: square-wave output on the SQW pin
15 - 1: square-wave output on the 32kHz pin
|
| /Linux-v5.4/Documentation/devicetree/bindings/clock/ti/davinci/ |
| D | pll.txt | 18 - ti,clkmode-square-wave: Indicates that the the board is supplying a square
19 wave input on the OSCIN pin instead of using a crystal oscillator.
61 ti,clkmode-square-wave;
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| /Linux-v5.4/sound/pci/au88x0/ |
| D | au88x0.c | 316 sizeof(snd_vortex_synth_arg_t), &wave) < 0 in snd_vortex_probe()
317 || wave == NULL) { in snd_vortex_probe()
322 arg = SNDRV_SEQ_DEVICE_ARGPTR(wave); in snd_vortex_probe()
323 strcpy(wave->name, "Aureal Synth"); in snd_vortex_probe()
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| /Linux-v5.4/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_gfx.h | 191 uint32_t wave, uint32_t *dst, int *no_fields);
193 uint32_t wave, uint32_t thread, uint32_t start,
196 uint32_t wave, uint32_t start, uint32_t size,
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| D | amdgpu_debugfs.c | 623 uint32_t offset, se, sh, cu, wave, simd, data[32]; in amdgpu_debugfs_wave_read() local
633 wave = (*pos & GENMASK_ULL(36, 31)) >> 31; in amdgpu_debugfs_wave_read()
642 adev->gfx.funcs->read_wave_data(adev, simd, wave, data, &x); in amdgpu_debugfs_wave_read()
695 uint32_t offset, se, sh, cu, wave, simd, thread, bank, *data; in amdgpu_debugfs_gpr_read() local
705 wave = (*pos & GENMASK_ULL(43, 36)) >> 36; in amdgpu_debugfs_gpr_read()
720 adev->gfx.funcs->read_wave_vgprs(adev, simd, wave, thread, offset, size>>2, data); in amdgpu_debugfs_gpr_read()
723 adev->gfx.funcs->read_wave_sgprs(adev, simd, wave, offset, size>>2, data); in amdgpu_debugfs_gpr_read()
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| D | gfx_v6_0.c | 2987 static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t ad… in wave_read_ind() argument
2990 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_ind()
2998 uint32_t wave, uint32_t thread, in wave_read_regs() argument
3002 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_regs()
3012 static void gfx_v6_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint3… in gfx_v6_0_read_wave_data() argument
3016 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); in gfx_v6_0_read_wave_data()
3017 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); in gfx_v6_0_read_wave_data()
3018 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v6_0_read_wave_data()
3019 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO); in gfx_v6_0_read_wave_data()
3020 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI); in gfx_v6_0_read_wave_data()
[all …]
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| D | gfx_v7_0.c | 4141 static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t ad… in wave_read_ind() argument
4144 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_ind()
4152 uint32_t wave, uint32_t thread, in wave_read_regs() argument
4156 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_regs()
4166 static void gfx_v7_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint3… in gfx_v7_0_read_wave_data() argument
4170 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); in gfx_v7_0_read_wave_data()
4171 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); in gfx_v7_0_read_wave_data()
4172 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v7_0_read_wave_data()
4173 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO); in gfx_v7_0_read_wave_data()
4174 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI); in gfx_v7_0_read_wave_data()
[all …]
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| D | gfx_v10_0.c | 1110 static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t wave, uint32_t address) in wave_read_ind() argument
1113 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_ind()
1118 static void wave_read_regs(struct amdgpu_device *adev, uint32_t wave, in wave_read_regs() argument
1123 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_regs()
1131 static void gfx_v10_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint… in gfx_v10_0_read_wave_data() argument
1140 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_STATUS); in gfx_v10_0_read_wave_data()
1141 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_PC_LO); in gfx_v10_0_read_wave_data()
1142 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_PC_HI); in gfx_v10_0_read_wave_data()
1143 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_EXEC_LO); in gfx_v10_0_read_wave_data()
1144 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_EXEC_HI); in gfx_v10_0_read_wave_data()
[all …]
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| D | gfx_v9_0.c | 1781 static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t ad… in wave_read_ind() argument
1784 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_ind()
1792 uint32_t wave, uint32_t thread, in wave_read_regs() argument
1796 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_regs()
1806 static void gfx_v9_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint3… in gfx_v9_0_read_wave_data() argument
1810 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); in gfx_v9_0_read_wave_data()
1811 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); in gfx_v9_0_read_wave_data()
1812 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v9_0_read_wave_data()
1813 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO); in gfx_v9_0_read_wave_data()
1814 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI); in gfx_v9_0_read_wave_data()
[all …]
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| D | gfx_v8_0.c | 5241 static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t ad… in wave_read_ind() argument
5244 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_ind()
5252 uint32_t wave, uint32_t thread, in wave_read_regs() argument
5256 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_regs()
5266 static void gfx_v8_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint3… in gfx_v8_0_read_wave_data() argument
5270 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); in gfx_v8_0_read_wave_data()
5271 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); in gfx_v8_0_read_wave_data()
5272 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v8_0_read_wave_data()
5273 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO); in gfx_v8_0_read_wave_data()
5274 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI); in gfx_v8_0_read_wave_data()
[all …]
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| /Linux-v5.4/drivers/gpu/ipu-v3/ |
| D | ipu-dc.c | 120 int map, int wave, int glue, int sync, int stop) in dc_write_tmpl() argument
129 reg1 = sync | glue << 4 | ++wave << 11 | ((operand << 15) & 0xffff8000); in dc_write_tmpl()
132 reg1 = sync | glue << 4 | ++wave << 11 | ++map << 15 | ((operand << 20) & 0xfff00000); in dc_write_tmpl()
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| /Linux-v5.4/Documentation/devicetree/bindings/clock/ |
| D | nvidia,tegra124-dfll.txt | 56 - nvidia,pwm-period-nanoseconds: period of PWM square wave in nanoseconds.
|
| /Linux-v5.4/Documentation/virt/kvm/ |
| D | timekeeping.txt | 95 Mode 3: Square Wave. This generates a high / low square wave. The count
104 which generates sine-like tones by low-pass filtering the square wave output.
242 bit 3 = Square wave interrupt enable
|
| /Linux-v5.4/drivers/media/rc/ |
| D | Kconfig | 402 wave and pulses.
|
