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Searched refs:vpu (Results 1 – 25 of 78) sorted by relevance

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/Linux-v5.4/drivers/media/platform/mtk-vpu/
Dmtk_vpu.c218 static inline void vpu_cfg_writel(struct mtk_vpu *vpu, u32 val, u32 offset) in vpu_cfg_writel() argument
220 writel(val, vpu->reg.cfg + offset); in vpu_cfg_writel()
223 static inline u32 vpu_cfg_readl(struct mtk_vpu *vpu, u32 offset) in vpu_cfg_readl() argument
225 return readl(vpu->reg.cfg + offset); in vpu_cfg_readl()
228 static inline bool vpu_running(struct mtk_vpu *vpu) in vpu_running() argument
230 return vpu_cfg_readl(vpu, VPU_RESET) & BIT(0); in vpu_running()
233 static void vpu_clock_disable(struct mtk_vpu *vpu) in vpu_clock_disable() argument
236 mutex_lock(&vpu->vpu_mutex); in vpu_clock_disable()
237 if (!--vpu->wdt_refcnt) in vpu_clock_disable()
238 vpu_cfg_writel(vpu, in vpu_clock_disable()
[all …]
/Linux-v5.4/drivers/media/platform/mtk-vcodec/
Dvdec_vpu_if.c14 struct vdec_vpu_inst *vpu = (struct vdec_vpu_inst *) in handle_init_ack_msg() local
17 mtk_vcodec_debug(vpu, "+ ap_inst_addr = 0x%llx", msg->ap_inst_addr); in handle_init_ack_msg()
21 vpu->vsi = vpu_mapping_dm_addr(vpu->dev, msg->vpu_inst_addr); in handle_init_ack_msg()
22 vpu->inst_addr = msg->vpu_inst_addr; in handle_init_ack_msg()
24 mtk_vcodec_debug(vpu, "- vpu_inst_addr = 0x%x", vpu->inst_addr); in handle_init_ack_msg()
34 struct vdec_vpu_inst *vpu = (struct vdec_vpu_inst *) in vpu_dec_ipi_handler() local
37 mtk_vcodec_debug(vpu, "+ id=%X", msg->msg_id); in vpu_dec_ipi_handler()
52 mtk_vcodec_err(vpu, "invalid msg=%X", msg->msg_id); in vpu_dec_ipi_handler()
57 mtk_vcodec_debug(vpu, "- id=%X", msg->msg_id); in vpu_dec_ipi_handler()
58 vpu->failure = msg->status; in vpu_dec_ipi_handler()
[all …]
Dvenc_vpu_if.c11 static void handle_enc_init_msg(struct venc_vpu_inst *vpu, void *data) in handle_enc_init_msg() argument
15 vpu->inst_addr = msg->vpu_inst_addr; in handle_enc_init_msg()
16 vpu->vsi = vpu_mapping_dm_addr(vpu->dev, msg->vpu_inst_addr); in handle_enc_init_msg()
19 static void handle_enc_encode_msg(struct venc_vpu_inst *vpu, void *data) in handle_enc_encode_msg() argument
23 vpu->state = msg->state; in handle_enc_encode_msg()
24 vpu->bs_size = msg->bs_size; in handle_enc_encode_msg()
25 vpu->is_key_frm = msg->is_key_frm; in handle_enc_encode_msg()
31 struct venc_vpu_inst *vpu = in vpu_enc_ipi_handler() local
34 mtk_vcodec_debug(vpu, "msg_id %x inst %p status %d", in vpu_enc_ipi_handler()
35 msg->msg_id, vpu, msg->status); in vpu_enc_ipi_handler()
[all …]
Dvdec_vpu_if.h42 int vpu_dec_init(struct vdec_vpu_inst *vpu);
52 int vpu_dec_start(struct vdec_vpu_inst *vpu, uint32_t *data, unsigned int len);
62 int vpu_dec_end(struct vdec_vpu_inst *vpu);
69 int vpu_dec_deinit(struct vdec_vpu_inst *vpu);
77 int vpu_dec_reset(struct vdec_vpu_inst *vpu);
Dvenc_vpu_if.h42 int vpu_enc_init(struct venc_vpu_inst *vpu);
43 int vpu_enc_set_param(struct venc_vpu_inst *vpu,
46 int vpu_enc_encode(struct venc_vpu_inst *vpu, unsigned int bs_mode,
50 int vpu_enc_deinit(struct venc_vpu_inst *vpu);
/Linux-v5.4/drivers/staging/media/hantro/
Dhantro_drv.c91 static void hantro_job_finish(struct hantro_dev *vpu, in hantro_job_finish() argument
99 pm_runtime_mark_last_busy(vpu->dev); in hantro_job_finish()
100 pm_runtime_put_autosuspend(vpu->dev); in hantro_job_finish()
101 clk_bulk_disable(vpu->variant->num_clocks, vpu->clocks); in hantro_job_finish()
121 v4l2_m2m_job_finish(vpu->m2m_dev, ctx->fh.m2m_ctx); in hantro_job_finish()
124 void hantro_irq_done(struct hantro_dev *vpu, unsigned int bytesused, in hantro_irq_done() argument
128 v4l2_m2m_get_curr_priv(vpu->m2m_dev); in hantro_irq_done()
135 if (cancel_delayed_work(&vpu->watchdog_work)) in hantro_irq_done()
136 hantro_job_finish(vpu, ctx, bytesused, result); in hantro_irq_done()
141 struct hantro_dev *vpu; in hantro_watchdog() local
[all …]
Drk3399_vpu_hw_jpeg_enc.c36 static void rk3399_vpu_set_src_img_ctrl(struct hantro_dev *vpu, in rk3399_vpu_set_src_img_ctrl() argument
47 vepu_write_relaxed(vpu, reg, VEPU_REG_INPUT_LUMA_INFO); in rk3399_vpu_set_src_img_ctrl()
57 vepu_write_relaxed(vpu, reg, VEPU_REG_ENC_OVER_FILL_STRM_OFFSET); in rk3399_vpu_set_src_img_ctrl()
60 vepu_write_relaxed(vpu, reg, VEPU_REG_ENC_CTRL1); in rk3399_vpu_set_src_img_ctrl()
63 static void rk3399_vpu_jpeg_enc_set_buffers(struct hantro_dev *vpu, in rk3399_vpu_jpeg_enc_set_buffers() argument
72 vepu_write_relaxed(vpu, ctx->jpeg_enc.bounce_buffer.dma, in rk3399_vpu_jpeg_enc_set_buffers()
74 vepu_write_relaxed(vpu, ctx->jpeg_enc.bounce_buffer.size, in rk3399_vpu_jpeg_enc_set_buffers()
79 vepu_write_relaxed(vpu, src[0], VEPU_REG_ADDR_IN_PLANE_0); in rk3399_vpu_jpeg_enc_set_buffers()
83 vepu_write_relaxed(vpu, src[0], VEPU_REG_ADDR_IN_PLANE_0); in rk3399_vpu_jpeg_enc_set_buffers()
84 vepu_write_relaxed(vpu, src[1], VEPU_REG_ADDR_IN_PLANE_1); in rk3399_vpu_jpeg_enc_set_buffers()
[all …]
Dhantro_h1_jpeg_enc.c18 static void hantro_h1_set_src_img_ctrl(struct hantro_dev *vpu, in hantro_h1_set_src_img_ctrl() argument
28 vepu_write_relaxed(vpu, reg, H1_REG_IN_IMG_CTRL); in hantro_h1_set_src_img_ctrl()
31 static void hantro_h1_jpeg_enc_set_buffers(struct hantro_dev *vpu, in hantro_h1_jpeg_enc_set_buffers() argument
40 vepu_write_relaxed(vpu, ctx->jpeg_enc.bounce_buffer.dma, in hantro_h1_jpeg_enc_set_buffers()
42 vepu_write_relaxed(vpu, ctx->jpeg_enc.bounce_buffer.size, in hantro_h1_jpeg_enc_set_buffers()
48 vepu_write_relaxed(vpu, src[0], H1_REG_ADDR_IN_PLANE_0); in hantro_h1_jpeg_enc_set_buffers()
52 vepu_write_relaxed(vpu, src[0], H1_REG_ADDR_IN_PLANE_0); in hantro_h1_jpeg_enc_set_buffers()
53 vepu_write_relaxed(vpu, src[1], H1_REG_ADDR_IN_PLANE_1); in hantro_h1_jpeg_enc_set_buffers()
58 vepu_write_relaxed(vpu, src[0], H1_REG_ADDR_IN_PLANE_0); in hantro_h1_jpeg_enc_set_buffers()
59 vepu_write_relaxed(vpu, src[1], H1_REG_ADDR_IN_PLANE_1); in hantro_h1_jpeg_enc_set_buffers()
[all …]
Drk3399_vpu_hw_vp8_dec.c281 struct hantro_dev *vpu = ctx->dev; in cfg_lf() local
286 hantro_reg_write(vpu, &vp8_dec_lf_level[0], lf->level); in cfg_lf()
292 hantro_reg_write(vpu, &vp8_dec_lf_level[i], lf_level); in cfg_lf()
296 hantro_reg_write(vpu, &vp8_dec_lf_level[i], in cfg_lf()
303 vdpu_write_relaxed(vpu, reg, VDPU_REG_FILTER_MB_ADJ); in cfg_lf()
307 hantro_reg_write(vpu, &vp8_dec_mb_adj[i], in cfg_lf()
309 hantro_reg_write(vpu, &vp8_dec_ref_adj[i], in cfg_lf()
320 struct hantro_dev *vpu = ctx->dev; in cfg_qp() local
324 hantro_reg_write(vpu, &vp8_dec_quant[0], q->y_ac_qi); in cfg_qp()
330 hantro_reg_write(vpu, &vp8_dec_quant[i], quant); in cfg_qp()
[all …]
Dhantro_g1_vp8_dec.c140 struct hantro_dev *vpu = ctx->dev; in cfg_lf() local
145 hantro_reg_write(vpu, &vp8_dec_lf_level[0], lf->level); in cfg_lf()
151 hantro_reg_write(vpu, &vp8_dec_lf_level[i], lf_level); in cfg_lf()
155 hantro_reg_write(vpu, &vp8_dec_lf_level[i], in cfg_lf()
162 vdpu_write_relaxed(vpu, reg, G1_REG_REF_PIC(0)); in cfg_lf()
166 hantro_reg_write(vpu, &vp8_dec_mb_adj[i], in cfg_lf()
168 hantro_reg_write(vpu, &vp8_dec_ref_adj[i], in cfg_lf()
182 struct hantro_dev *vpu = ctx->dev; in cfg_qp() local
186 hantro_reg_write(vpu, &vp8_dec_quant[0], q->y_ac_qi); in cfg_qp()
192 hantro_reg_write(vpu, &vp8_dec_quant[i], quant); in cfg_qp()
[all …]
Drk3288_vpu_hw.c107 struct hantro_dev *vpu = dev_id; in rk3288_vepu_irq() local
111 status = vepu_read(vpu, H1_REG_INTERRUPT); in rk3288_vepu_irq()
112 bytesused = vepu_read(vpu, H1_REG_STR_BUF_LIMIT) / 8; in rk3288_vepu_irq()
116 vepu_write(vpu, 0, H1_REG_INTERRUPT); in rk3288_vepu_irq()
117 vepu_write(vpu, 0, H1_REG_AXI_CTRL); in rk3288_vepu_irq()
119 hantro_irq_done(vpu, bytesused, state); in rk3288_vepu_irq()
126 struct hantro_dev *vpu = dev_id; in rk3288_vdpu_irq() local
130 status = vdpu_read(vpu, G1_REG_INTERRUPT); in rk3288_vdpu_irq()
134 vdpu_write(vpu, 0, G1_REG_INTERRUPT); in rk3288_vdpu_irq()
135 vdpu_write(vpu, G1_REG_CONFIG_DEC_CLK_GATE_E, G1_REG_CONFIG); in rk3288_vdpu_irq()
[all …]
Drk3399_vpu_hw.c93 struct hantro_dev *vpu = dev_id; in rk3399_vepu_irq() local
97 status = vepu_read(vpu, VEPU_REG_INTERRUPT); in rk3399_vepu_irq()
98 bytesused = vepu_read(vpu, VEPU_REG_STR_BUF_LIMIT) / 8; in rk3399_vepu_irq()
102 vepu_write(vpu, 0, VEPU_REG_INTERRUPT); in rk3399_vepu_irq()
103 vepu_write(vpu, 0, VEPU_REG_AXI_CTRL); in rk3399_vepu_irq()
105 hantro_irq_done(vpu, bytesused, state); in rk3399_vepu_irq()
112 struct hantro_dev *vpu = dev_id; in rk3399_vdpu_irq() local
116 status = vdpu_read(vpu, VDPU_REG_INTERRUPT); in rk3399_vdpu_irq()
120 vdpu_write(vpu, 0, VDPU_REG_INTERRUPT); in rk3399_vdpu_irq()
121 vdpu_write(vpu, 0, VDPU_REG_AXI_CTRL); in rk3399_vdpu_irq()
[all …]
Dhantro_g1_h264_dec.c30 struct hantro_dev *vpu = ctx->dev; in set_params() local
49 vdpu_write_relaxed(vpu, reg, G1_REG_DEC_CTRL0); in set_params()
55 vdpu_write_relaxed(vpu, reg, G1_REG_DEC_CTRL1); in set_params()
66 vdpu_write_relaxed(vpu, reg, G1_REG_DEC_CTRL2); in set_params()
72 vdpu_write_relaxed(vpu, reg, G1_REG_DEC_CTRL3); in set_params()
86 vdpu_write_relaxed(vpu, reg, G1_REG_DEC_CTRL4); in set_params()
101 vdpu_write_relaxed(vpu, reg, G1_REG_DEC_CTRL5); in set_params()
108 vdpu_write_relaxed(vpu, reg, G1_REG_DEC_CTRL6); in set_params()
111 vdpu_write_relaxed(vpu, 0, G1_REG_ERR_CONC); in set_params()
114 vdpu_write_relaxed(vpu, in set_params()
[all …]
Drk3399_vpu_hw_mpeg2_dec.c87 rk3399_vpu_mpeg2_dec_set_quantization(struct hantro_dev *vpu, in rk3399_vpu_mpeg2_dec_set_quantization() argument
95 vdpu_write_relaxed(vpu, ctx->mpeg2_dec.qtable.dma, in rk3399_vpu_mpeg2_dec_set_quantization()
100 rk3399_vpu_mpeg2_dec_set_buffers(struct hantro_dev *vpu, in rk3399_vpu_mpeg2_dec_set_buffers() argument
126 vdpu_write_relaxed(vpu, addr, VDPU_REG_RLC_VLC_BASE); in rk3399_vpu_mpeg2_dec_set_buffers()
134 vdpu_write_relaxed(vpu, addr, VDPU_REG_DEC_OUT_BASE); in rk3399_vpu_mpeg2_dec_set_buffers()
148 vdpu_write_relaxed(vpu, forward_addr, VDPU_REG_REFER0_BASE); in rk3399_vpu_mpeg2_dec_set_buffers()
149 vdpu_write_relaxed(vpu, forward_addr, VDPU_REG_REFER1_BASE); in rk3399_vpu_mpeg2_dec_set_buffers()
151 vdpu_write_relaxed(vpu, forward_addr, VDPU_REG_REFER0_BASE); in rk3399_vpu_mpeg2_dec_set_buffers()
152 vdpu_write_relaxed(vpu, current_addr, VDPU_REG_REFER1_BASE); in rk3399_vpu_mpeg2_dec_set_buffers()
154 vdpu_write_relaxed(vpu, current_addr, VDPU_REG_REFER0_BASE); in rk3399_vpu_mpeg2_dec_set_buffers()
[all …]
Dhantro_g1_mpeg2_dec.c85 hantro_g1_mpeg2_dec_set_quantization(struct hantro_dev *vpu, in hantro_g1_mpeg2_dec_set_quantization() argument
94 vdpu_write_relaxed(vpu, ctx->mpeg2_dec.qtable.dma, in hantro_g1_mpeg2_dec_set_quantization()
99 hantro_g1_mpeg2_dec_set_buffers(struct hantro_dev *vpu, struct hantro_ctx *ctx, in hantro_g1_mpeg2_dec_set_buffers() argument
124 vdpu_write_relaxed(vpu, addr, G1_REG_RLC_VLC_BASE); in hantro_g1_mpeg2_dec_set_buffers()
132 vdpu_write_relaxed(vpu, addr, G1_REG_DEC_OUT_BASE); in hantro_g1_mpeg2_dec_set_buffers()
146 vdpu_write_relaxed(vpu, forward_addr, G1_REG_REFER0_BASE); in hantro_g1_mpeg2_dec_set_buffers()
147 vdpu_write_relaxed(vpu, forward_addr, G1_REG_REFER1_BASE); in hantro_g1_mpeg2_dec_set_buffers()
149 vdpu_write_relaxed(vpu, forward_addr, G1_REG_REFER0_BASE); in hantro_g1_mpeg2_dec_set_buffers()
150 vdpu_write_relaxed(vpu, current_addr, G1_REG_REFER1_BASE); in hantro_g1_mpeg2_dec_set_buffers()
152 vdpu_write_relaxed(vpu, current_addr, G1_REG_REFER0_BASE); in hantro_g1_mpeg2_dec_set_buffers()
[all …]
Dhantro.h95 int (*init)(struct hantro_dev *vpu);
96 int (*runtime_resume)(struct hantro_dev *vpu);
325 static inline void vepu_write_relaxed(struct hantro_dev *vpu, in vepu_write_relaxed() argument
329 writel_relaxed(val, vpu->enc_base + reg); in vepu_write_relaxed()
332 static inline void vepu_write(struct hantro_dev *vpu, u32 val, u32 reg) in vepu_write() argument
335 writel(val, vpu->enc_base + reg); in vepu_write()
338 static inline u32 vepu_read(struct hantro_dev *vpu, u32 reg) in vepu_read() argument
340 u32 val = readl(vpu->enc_base + reg); in vepu_read()
346 static inline void vdpu_write_relaxed(struct hantro_dev *vpu, in vdpu_write_relaxed() argument
350 writel_relaxed(val, vpu->dec_base + reg); in vdpu_write_relaxed()
[all …]
Dhantro_mpeg2.c40 struct hantro_dev *vpu = ctx->dev; in hantro_mpeg2_dec_init() local
44 dma_alloc_coherent(vpu->dev, in hantro_mpeg2_dec_init()
55 struct hantro_dev *vpu = ctx->dev; in hantro_mpeg2_dec_exit() local
57 dma_free_coherent(vpu->dev, in hantro_mpeg2_dec_exit()
Dhantro_vp8.c147 struct hantro_dev *vpu = ctx->dev; in hantro_vp8_dec_init() local
164 aux_buf->cpu = dma_alloc_coherent(vpu->dev, aux_buf->size, in hantro_vp8_dec_init()
175 aux_buf->cpu = dma_alloc_coherent(vpu->dev, aux_buf->size, in hantro_vp8_dec_init()
185 dma_free_coherent(vpu->dev, ctx->vp8_dec.segment_map.size, in hantro_vp8_dec_init()
195 struct hantro_dev *vpu = ctx->dev; in hantro_vp8_dec_exit() local
197 dma_free_coherent(vpu->dev, vp8_dec->segment_map.size, in hantro_vp8_dec_exit()
199 dma_free_coherent(vpu->dev, vp8_dec->prob_tbl.size, in hantro_vp8_dec_exit()
/Linux-v5.4/drivers/media/platform/mtk-mdp/
Dmtk_mdp_vpu.c13 static inline struct mtk_mdp_ctx *vpu_to_ctx(struct mtk_mdp_vpu *vpu) in vpu_to_ctx() argument
15 return container_of(vpu, struct mtk_mdp_ctx, vpu); in vpu_to_ctx()
20 struct mtk_mdp_vpu *vpu = (struct mtk_mdp_vpu *) in mtk_mdp_vpu_handle_init_ack() local
24 vpu->vsi = (struct mdp_process_vsi *) in mtk_mdp_vpu_handle_init_ack()
25 vpu_mapping_dm_addr(vpu->pdev, msg->vpu_inst_addr); in mtk_mdp_vpu_handle_init_ack()
26 vpu->inst_addr = msg->vpu_inst_addr; in mtk_mdp_vpu_handle_init_ack()
33 struct mtk_mdp_vpu *vpu = (struct mtk_mdp_vpu *) in mtk_mdp_vpu_ipi_handler() local
37 vpu->failure = msg->status; in mtk_mdp_vpu_ipi_handler()
38 if (!vpu->failure) { in mtk_mdp_vpu_ipi_handler()
47 ctx = vpu_to_ctx(vpu); in mtk_mdp_vpu_ipi_handler()
[all …]
Dmtk_mdp_regs.c51 struct mdp_buffer *src_buf = &ctx->vpu.vsi->src_buffer; in mtk_mdp_hw_set_input_addr()
61 struct mdp_buffer *dst_buf = &ctx->vpu.vsi->dst_buffer; in mtk_mdp_hw_set_output_addr()
71 struct mdp_config *config = &ctx->vpu.vsi->src_config; in mtk_mdp_hw_set_in_size()
92 struct mdp_config *config = &ctx->vpu.vsi->src_config; in mtk_mdp_hw_set_in_image_format()
93 struct mdp_buffer *src_buf = &ctx->vpu.vsi->src_buffer; in mtk_mdp_hw_set_in_image_format()
107 struct mdp_config *config = &ctx->vpu.vsi->dst_config; in mtk_mdp_hw_set_out_size()
123 struct mdp_config *config = &ctx->vpu.vsi->dst_config; in mtk_mdp_hw_set_out_image_format()
124 struct mdp_buffer *dst_buf = &ctx->vpu.vsi->dst_buffer; in mtk_mdp_hw_set_out_image_format()
136 struct mdp_config_misc *misc = &ctx->vpu.vsi->misc; in mtk_mdp_hw_set_rotation()
145 struct mdp_config_misc *misc = &ctx->vpu.vsi->misc; in mtk_mdp_hw_set_global_alpha()
Dmtk_mdp_vpu.h29 int mtk_mdp_vpu_init(struct mtk_mdp_vpu *vpu);
30 int mtk_mdp_vpu_deinit(struct mtk_mdp_vpu *vpu);
31 int mtk_mdp_vpu_process(struct mtk_mdp_vpu *vpu);
/Linux-v5.4/Documentation/devicetree/bindings/media/
Drockchip-vpu.txt8 "rockchip,rk3288-vpu";
9 "rockchip,rk3328-vpu";
10 "rockchip,rk3399-vpu";
22 vpu: video-codec@ff9a0000 {
23 compatible = "rockchip,rk3288-vpu";
34 vpu: video-codec@ff350000 {
35 compatible = "rockchip,rk3328-vpu";
Dcoda.txt9 (a) "fsl,imx27-vpu" for CodaDx6 present in i.MX27
10 (b) "fsl,imx51-vpu" for CodaHx4 present in i.MX51
11 (c) "fsl,imx53-vpu" for CODA7541 present in i.MX53
12 (d) "fsl,imx6q-vpu" for CODA960 present in i.MX6q
24 vpu: vpu@63ff4000 {
25 compatible = "fsl,imx53-vpu";
/Linux-v5.4/drivers/media/platform/mtk-vcodec/vdec/
Dvdec_h264_if.c131 struct vdec_vpu_inst vpu; member
283 inst->vpu.id = IPI_VDEC_H264; in vdec_h264_init()
284 inst->vpu.dev = ctx->dev->vpu_plat_dev; in vdec_h264_init()
285 inst->vpu.ctx = ctx; in vdec_h264_init()
286 inst->vpu.handler = vpu_dec_ipi_handler; in vdec_h264_init()
288 err = vpu_dec_init(&inst->vpu); in vdec_h264_init()
294 inst->vsi = (struct vdec_h264_vsi *)inst->vpu.vsi; in vdec_h264_init()
305 vpu_dec_deinit(&inst->vpu); in vdec_h264_init()
318 vpu_dec_deinit(&inst->vpu); in vdec_h264_deinit()
341 struct vdec_vpu_inst *vpu = &inst->vpu; in vdec_h264_decode() local
[all …]
/Linux-v5.4/Documentation/devicetree/bindings/power/
Damlogic,meson-gx-pwrc.txt20 - "amlogic,meson-gx-pwrc-vpu" for the Meson GX SoCs
21 - "amlogic,meson-g12a-pwrc-vpu" for the Meson G12A SoCs
27 - clock-names: from common clock binding: must contain "vpu", "vapb"
41 pwrc_vpu: power-controller-vpu {
42 compatible = "amlogic,meson-gx-pwrc-vpu";
59 clock-names = "vpu", "vapb";

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