Searched refs:vdd_dep_on_sclk (Results 1 – 11 of 11) sorted by relevance
522 pcie_count = (pp_table_information->vdd_dep_on_sclk->count) + 1; in get_pcie_table()561 pcie_count = (pp_table_information->vdd_dep_on_sclk->count) + 1; in get_pcie_table()745 if (pp_table_information->vdd_dep_on_sclk->count < in get_gpio_table()794 pp_table_information->vdd_dep_on_sclk = NULL; in init_clock_voltage_dependency()810 &pp_table_information->vdd_dep_on_sclk, sclk_dep_table); in init_clock_voltage_dependency()838 if (result == 0 && (NULL != pp_table_information->vdd_dep_on_sclk) in init_clock_voltage_dependency()839 && (0 != pp_table_information->vdd_dep_on_sclk->count)) in init_clock_voltage_dependency()841 pp_table_information->vdd_dep_on_sclk); in init_clock_voltage_dependency()1114 kfree(pp_table_information->vdd_dep_on_sclk); in pp_tables_v1_0_uninitialize()1115 pp_table_information->vdd_dep_on_sclk = NULL; in pp_tables_v1_0_uninitialize()
471 for (entry_id = 0; entry_id < table_info->vdd_dep_on_sclk->count; entry_id++) { in phm_get_sclk_for_voltage_evv()472 voltage_id = table_info->vdd_dep_on_sclk->entries[entry_id].vddInd; in phm_get_sclk_for_voltage_evv()477 if (entry_id >= table_info->vdd_dep_on_sclk->count) { in phm_get_sclk_for_voltage_evv()482 *sclk = table_info->vdd_dep_on_sclk->entries[entry_id].clk; in phm_get_sclk_for_voltage_evv()555 vddc_table = table_info->vdd_dep_on_sclk; in phm_apply_dal_min_voltage_request()
830 pcie_count = table_info->vdd_dep_on_sclk->count; in get_pcie_table()956 pp_table_info->vdd_dep_on_sclk = NULL; in init_powerplay_extended_tables()982 &pp_table_info->vdd_dep_on_sclk, in init_powerplay_extended_tables()1040 pp_table_info->vdd_dep_on_sclk && in init_powerplay_extended_tables()1041 pp_table_info->vdd_dep_on_sclk->count) in init_powerplay_extended_tables()1044 pp_table_info->vdd_dep_on_sclk); in init_powerplay_extended_tables()1236 kfree(pp_table_info->vdd_dep_on_sclk); in vega10_pp_tables_uninitialize()1237 pp_table_info->vdd_dep_on_sclk = NULL; in vega10_pp_tables_uninitialize()
329 dep_table[0] = table_info->vdd_dep_on_sclk; in vega10_odn_initial_default_setting()332 od_table[0] = (struct phm_ppt_v1_clock_voltage_dependency_table *)&odn_table->vdd_dep_on_sclk; in vega10_odn_initial_default_setting()529 for (entry_id = 0; entry_id < table_info->vdd_dep_on_sclk->count; entry_id++) { in vega10_get_socclk_for_voltage_evv()674 case 1: vdt = table_info->vdd_dep_on_sclk; break; in vega10_patch_voltage_dependency_tables_with_lookup_table()1182 table_info->vdd_dep_on_sclk, in vega10_construct_voltage_tables()1301 table_info->vdd_dep_on_sclk; in vega10_setup_default_dpm_tables()1564 &(data->odn_dpm_table.vdd_dep_on_sclk); in vega10_populate_single_gfx_level()1566 dep_on_sclk = table_info->vdd_dep_on_sclk; in vega10_populate_single_gfx_level()2089 table_info->vdd_dep_on_sclk; in vega10_populate_clock_stretcher_table()2108 table_info->vdd_dep_on_sclk; in vega10_populate_avfs_parameters()[all …]
767 dep_sclk_table = table_info->vdd_dep_on_sclk; in smu7_setup_dpm_tables_v1()834 dep_sclk_table = table_info->vdd_dep_on_sclk; in smu7_odn_initial_default_setting()876 dep_sclk_table = table_info->vdd_dep_on_sclk; in smu7_setup_voltage_range_from_vbios()932 dep_table = table_info->vdd_dep_on_sclk; in smu7_check_dpm_table_updated()1715 sclk_table = table_info->vdd_dep_on_sclk; in smu7_get_evv_voltages()1749 sclk_table = table_info->vdd_dep_on_sclk; in smu7_get_evv_voltages()1852 table_info->vdd_dep_on_sclk; in smu7_patch_voltage_dependency_tables_with_lookup_table()1932 phm_ppt_v1_clock_voltage_dependency_table *sclk_table = pptable_info->vdd_dep_on_sclk; in smu7_calc_voltage_dependency_tables()2076 table_info->vdd_dep_on_sclk; in smu7_set_private_data_based_on_pptable_v1()2774 for (count = table_info->vdd_dep_on_sclk->count-1; count >= 0; count--) { in smu7_get_profiling_clk()[all …]
295 struct vega10_odn_clock_voltage_dependency_table vdd_dep_on_sclk; member
821 table_info->vdd_dep_on_sclk, clock, in vegam_populate_single_graphic_level()1125 table_info->vdd_dep_on_sclk, in vegam_populate_smc_acpi_level()1413 count = (uint8_t)(table_info->vdd_dep_on_sclk->count); in vegam_populate_smc_initial_state()1416 if (table_info->vdd_dep_on_sclk->entries[level].clk >= in vegam_populate_smc_initial_state()1500 table_info->vdd_dep_on_sclk; in vegam_populate_clock_stretcher_data_table()1583 table_info->vdd_dep_on_sclk; in vegam_populate_avfs_parameters()
923 vdd_dep_table = table_info->vdd_dep_on_sclk; in polaris10_populate_single_graphic_level()1216 table_info->vdd_dep_on_sclk, in polaris10_populate_smc_acpi_level()1489 count = (uint8_t)(table_info->vdd_dep_on_sclk->count); in polaris10_populate_smc_initailial_state()1492 if (table_info->vdd_dep_on_sclk->entries[level].clk >= in polaris10_populate_smc_initailial_state()1520 table_info->vdd_dep_on_sclk; in polaris10_populate_clock_stretcher_data_table()1656 table_info->vdd_dep_on_sclk; in polaris10_populate_avfs_parameters()
954 vdd_dep_table = table_info->vdd_dep_on_sclk; in fiji_populate_single_graphic_level()1322 table_info->vdd_dep_on_sclk, in fiji_populate_smc_acpi_level()1645 count = (uint8_t)(table_info->vdd_dep_on_sclk->count); in fiji_populate_smc_initailial_state()1647 if (table_info->vdd_dep_on_sclk->entries[level].clk >= in fiji_populate_smc_initailial_state()1677 table_info->vdd_dep_on_sclk; in fiji_populate_clock_stretcher_data_table()
632 vdd_dep_table = pptable_info->vdd_dep_on_sclk; in tonga_populate_single_graphic_level()1585 table_info->vdd_dep_on_sclk; in tonga_populate_clock_stretcher_data_table()
523 struct phm_ppt_v1_clock_voltage_dependency_table *vdd_dep_on_sclk; member552 struct phm_ppt_v1_clock_voltage_dependency_table *vdd_dep_on_sclk; member