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Searched refs:up_hyst_offset (Results 1 – 4 of 4) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/powerplay/smumgr/
Dfiji_smumgr.c2566 uint32_t offset, up_hyst_offset, down_hyst_offset, clk_activity_offset, tmp; in fiji_update_dpm_settings() local
2593 up_hyst_offset = array + (sizeof(SMU73_Discrete_GraphicsLevel) * i) in fiji_update_dpm_settings()
2597 offset = up_hyst_offset & ~0x3; in fiji_update_dpm_settings()
2599 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, levels[i].UpHyst, sizeof(uint8_t)); in fiji_update_dpm_settings()
2628 up_hyst_offset = mclk_array + (sizeof(SMU73_Discrete_MemoryLevel) * i) in fiji_update_dpm_settings()
2632 offset = up_hyst_offset & ~0x3; in fiji_update_dpm_settings()
2634 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpHyst, sizeof(uint8_t)); in fiji_update_dpm_settings()
Dpolaris10_smumgr.c2479 uint32_t offset, up_hyst_offset, down_hyst_offset, clk_activity_offset, tmp; in polaris10_update_dpm_settings() local
2506 up_hyst_offset = array + (sizeof(SMU74_Discrete_GraphicsLevel) * i) in polaris10_update_dpm_settings()
2510 offset = up_hyst_offset & ~0x3; in polaris10_update_dpm_settings()
2512 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, levels[i].UpHyst, sizeof(uint8_t)); in polaris10_update_dpm_settings()
2541 up_hyst_offset = mclk_array + (sizeof(SMU74_Discrete_MemoryLevel) * i) in polaris10_update_dpm_settings()
2545 offset = up_hyst_offset & ~0x3; in polaris10_update_dpm_settings()
2547 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpHyst, sizeof(uint8_t)); in polaris10_update_dpm_settings()
Dci_smumgr.c2774 uint32_t offset, up_hyst_offset, down_hyst_offset, clk_activity_offset, tmp; in ci_update_dpm_settings() local
2801 up_hyst_offset = array + (sizeof(SMU7_Discrete_GraphicsLevel) * i) in ci_update_dpm_settings()
2805 offset = up_hyst_offset & ~0x3; in ci_update_dpm_settings()
2807 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, levels[i].UpH, sizeof(uint8_t)); in ci_update_dpm_settings()
2836 up_hyst_offset = mclk_array + (sizeof(SMU7_Discrete_MemoryLevel) * i) in ci_update_dpm_settings()
2840 offset = up_hyst_offset & ~0x3; in ci_update_dpm_settings()
2842 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpH, sizeof(uint8_t)); in ci_update_dpm_settings()
Dtonga_smumgr.c3162 uint32_t offset, up_hyst_offset, down_hyst_offset, clk_activity_offset, tmp; in tonga_update_dpm_settings() local
3189 up_hyst_offset = array + (sizeof(SMU72_Discrete_GraphicsLevel) * i) in tonga_update_dpm_settings()
3193 offset = up_hyst_offset & ~0x3; in tonga_update_dpm_settings()
3195 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, levels[i].UpHyst, sizeof(uint8_t)); in tonga_update_dpm_settings()
3224 up_hyst_offset = mclk_array + (sizeof(SMU72_Discrete_MemoryLevel) * i) in tonga_update_dpm_settings()
3228 offset = up_hyst_offset & ~0x3; in tonga_update_dpm_settings()
3230 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpHyst, sizeof(uint8_t)); in tonga_update_dpm_settings()