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Searched refs:ull (Results 1 – 25 of 68) sorted by relevance

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/Linux-v5.4/drivers/clk/imx/
Dclk-pllv1.c56 unsigned long long ull; in clk_pllv1_recalc_rate() local
98 ull = (unsigned long long)rate * mfn_abs; in clk_pllv1_recalc_rate()
100 do_div(ull, mfd + 1); in clk_pllv1_recalc_rate()
103 ull = (rate * mfi) - ull; in clk_pllv1_recalc_rate()
105 ull = (rate * mfi) + ull; in clk_pllv1_recalc_rate()
107 return ull; in clk_pllv1_recalc_rate()
/Linux-v5.4/arch/parisc/lib/
Ducmpdi2.c5 unsigned long long ull; member
14 union ull_union au = {.ull = a}; in __ucmpdi2()
15 union ull_union bu = {.ull = b}; in __ucmpdi2()
/Linux-v5.4/drivers/crypto/cavium/zip/
Dzip_main.c155 que_sbuf_ctl.u_reg64 = 0ull; in zip_init_hw()
184 que_sbuf_addr.u_reg64 = 0ull; in zip_init_hw()
218 que_map.u_reg64 = 0ull; in zip_init_hw()
228 que_pri.u_reg64 = 0ull; in zip_init_hw()
465 u64 val = 0ull; in zip_show_stats()
466 u64 avg_chunk = 0ull, avg_cr = 0ull; in zip_show_stats()
Dzip_device.c133 ncp.u_reg64 = 0ull; in zip_load_instr()
158 dbell.u_reg64 = 0ull; in zip_load_instr()
/Linux-v5.4/arch/powerpc/include/asm/
Dspu.h412 #define MFC_CNTL_RESUME_DMA_QUEUE (0ull << 0)
416 #define MFC_CNTL_NORMAL_DMA_QUEUE_OPERATION (0ull << 8)
612 #define MFC_LSACR_COMPARE_MASK ((~0ull) << 32)
613 #define MFC_LSACR_COMPARE_ADDR ((~0ull) >> 32)
618 #define MFC_LSCRR_QI_MASK ((~0ull) << MFC_LSCRR_QI_SHIFT)
663 #define SPU_ECC_CNTL_E (1ull << 0ull)
/Linux-v5.4/arch/x86/include/asm/
Dprocessor-flags.h48 #define CR3_PCID_MASK 0ull
Dpgtable-invert.h24 return __pte_needs_invert(val) ? ~0ull : 0; in protnone_mask()
/Linux-v5.4/arch/mips/include/asm/octeon/
Dcvmx-pip.h47 CVMX_PIP_L4_NO_ERR = 0ull,
78 CVMX_PIP_IP_NO_ERR = 0ull,
102 CVMX_PIP_RX_NO_ERR = 0ull,
Dcvmx-ciu-defs.h13 (CVMX_ADD_IO_SEG(0x0001070000000000ull + addr##ull) + \
/Linux-v5.4/drivers/crypto/cavium/cpt/
Dcptpf_main.c95 cpt_write_csr64(cpt->reg_base, CPTX_PF_MBOX_ENA_W1CX(0, 0), ~0ull); in cpt_disable_mbox_interrupts()
101 cpt_write_csr64(cpt->reg_base, CPTX_PF_ECC0_ENA_W1C(0), ~0ull); in cpt_disable_ecc_interrupts()
107 cpt_write_csr64(cpt->reg_base, CPTX_PF_EXEC_ENA_W1C(0), ~0ull); in cpt_disable_exec_interrupts()
120 cpt_write_csr64(cpt->reg_base, CPTX_PF_MBOX_ENA_W1SX(0, 0), ~0ull); in cpt_enable_mbox_interrupts()
426 CPTX_PF_ENGX_UCODE_BASE(0, core), 0ull); in cpt_unload_microcode()
Dcptpf_mbox.c23 mbx->data = 0ull; in cpt_mbox_send_ack()
/Linux-v5.4/drivers/misc/cxl/
Dcxllib.c13 #define CXL_INVALID_DRA ~0ull
67 (~0ull << CXL_DUMMY_READ_ALIGN); in allocate_dummy_read_buf()
/Linux-v5.4/drivers/infiniband/core/
Dpacker.c101 mask = cpu_to_be64((~0ull >> (64 - desc[i].size_bits)) << shift); in ib_pack()
180 mask = (~0ull >> (64 - desc[i].size_bits)) << shift; in ib_unpack()
/Linux-v5.4/Documentation/devicetree/bindings/crypto/
Dfsl-dcp.txt9 - clocks : Clock reference (only required on some SOCs: 6ull and 6sll).
/Linux-v5.4/fs/ocfs2/
Docfs2_trace.h305 TP_PROTO(unsigned long long ull, int value1, int value2, int value3),
306 TP_ARGS(ull, value1, value2, value3),
308 __field( unsigned long long, ull )
314 __entry->ull = ull;
320 __entry->ull, __entry->value1,
326 TP_PROTO(unsigned long long ull, int value1, \
328 TP_ARGS(ull, value1, value2, value3))
331 TP_PROTO(unsigned long long ull, unsigned int value1,
333 TP_ARGS(ull, value1, value2, value3),
335 __field(unsigned long long, ull)
[all …]
/Linux-v5.4/arch/powerpc/platforms/cell/spufs/
Dspu_utils.h15 unsigned long long ull; member
/Linux-v5.4/arch/powerpc/mm/
Dinit_32.c59 phys_addr_t memstart_addr = (phys_addr_t)~0ull;
/Linux-v5.4/include/linux/
Dbitfield.h52 BUILD_BUG_ON_MSG((_mask) > (typeof(_reg))~0ull, \
/Linux-v5.4/drivers/block/
Dskd_s1120.h21 #define FIT_QCMD_FLUSH_QUEUE (0ull) /* add QID */
/Linux-v5.4/include/linux/ceph/
Dceph_features.h10 #define CEPH_FEATURE_INCARNATION_1 (0ull)
/Linux-v5.4/arch/x86/boot/
Dstring.c284 if (unlikely(res & (~0ull << 60))) { in _parse_integer()
/Linux-v5.4/drivers/gpu/drm/i915/gt/
Dintel_timeline.c84 hwsp->free_bitmap = ~0ull; in hwsp_alloc()
118 if (hwsp->free_bitmap == ~0ull) { in __idle_hwsp_free()
/Linux-v5.4/drivers/infiniband/hw/hfi1/
Dchip.c156 #define LRH_BTH_QW 0ull
165 #define LRH_SC_QW 0ull
170 #define LRH_SC_VALUE 0ull
180 #define L2_TYPE_QW 0ull
189 #define L4_TYPE_BIT_OFFSET 0ull
658 /* 0*/ FLAG_ENTRY0("Reserved", 0ull),
6557 write_csr(dd, DC_DC8051_CFG_RST, 0ull); in _dc_start()
6815 freeze ? ALL_FROZE : 0ull); in wait_for_freeze_status()
9201 write_csr(dd, DC_LCB_ERR_EN, ~0ull); /* watch LCB errors */ in do_quick_linkup()
10415 write_csr(dd, DC_LCB_ERR_EN, ~0ull); /* watch LCB errors */ in goto_offline()
[all …]
/Linux-v5.4/lib/
Dkstrtox.c73 if (unlikely(res & (~0ull << 60))) { in _parse_integer()
/Linux-v5.4/drivers/edac/
Dskx_common.c351 if (size == ~0ull) in skx_get_nvdimm_info()
368 return (size == 0 || size == ~0ull) ? 0 : 1; in skx_get_nvdimm_info()

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