Searched refs:ufshcd_dme_set (Results 1 – 8 of 8) sorted by relevance
/Linux-v5.4/drivers/scsi/ufs/ |
D | ufs-hisi.c | 146 ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0xD0C1, 0x0), 0x1); in ufs_hisi_link_startup_pre_change() 148 ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x156A, 0x0), 0x2); in ufs_hisi_link_startup_pre_change() 150 ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x8114, 0x0), 0x1); in ufs_hisi_link_startup_pre_change() 152 ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x8121, 0x0), 0x2D); in ufs_hisi_link_startup_pre_change() 154 ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x8122, 0x0), 0x1); in ufs_hisi_link_startup_pre_change() 158 ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x8127, 0x0), 0x98); in ufs_hisi_link_startup_pre_change() 160 ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x8128, 0x0), 0x1); in ufs_hisi_link_startup_pre_change() 164 ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0xD085, 0x0), 0x1); in ufs_hisi_link_startup_pre_change() 166 ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x800D, 0x4), 0x58); in ufs_hisi_link_startup_pre_change() 168 ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x800D, 0x5), 0x58); in ufs_hisi_link_startup_pre_change() [all …]
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D | ufs-mediatek.c | 30 ufshcd_dme_set(hba, in ufs_mtk_cfg_unipro_cg() 36 ufshcd_dme_set(hba, in ufs_mtk_cfg_unipro_cg() 44 ufshcd_dme_set(hba, in ufs_mtk_cfg_unipro_cg() 50 ufshcd_dme_set(hba, in ufs_mtk_cfg_unipro_cg() 233 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(VS_SAVEPOWERCONTROL), tmp); in ufs_mtk_pre_link() 241 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE), 0); in ufs_mtk_post_link()
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D | tc-dwc-g210.c | 271 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(VS_MPHYCFGUPDT), 0x01); in tc_dwc_g210_config_40_bit() 276 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(VS_DEBUGOMC), 0x01); in tc_dwc_g210_config_40_bit() 303 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(VS_MPHYCFGUPDT), 0x01); in tc_dwc_g210_config_20_bit() 308 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(VS_DEBUGOMC), 0x01); in tc_dwc_g210_config_20_bit()
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D | cdns-pltfrm.c | 100 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE), 0); in cdns_ufs_link_startup_notify()
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D | ufshcd-pci.c | 47 ufshcd_dme_set(hba, attr, 0); in ufs_intel_disable_lcc()
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D | ufs-qcom.c | 513 err = ufshcd_dme_set(hba, in ufs_qcom_link_startup_notify() 901 err = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_VS_CONFIG_REG1), in ufs_qcom_quirk_host_pa_saveconfigtime() 1240 err = ufshcd_dme_set(hba, in ufs_qcom_set_dme_vs_core_clk_ctrl_clear_div() 1281 err = ufshcd_dme_set(hba, in ufs_qcom_clk_scale_down_pre_change()
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D | ufshcd.c | 3829 ret = ufshcd_dme_set(hba, in ufshcd_uic_change_pwr_mode() 4058 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), pwr_mode->gear_rx); in ufshcd_change_power_mode() 4059 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES), in ufshcd_change_power_mode() 4063 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), TRUE); in ufshcd_change_power_mode() 4065 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), FALSE); in ufshcd_change_power_mode() 4067 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), pwr_mode->gear_tx); in ufshcd_change_power_mode() 4068 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES), in ufshcd_change_power_mode() 4072 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), TRUE); in ufshcd_change_power_mode() 4074 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), FALSE); in ufshcd_change_power_mode() 4080 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES), in ufshcd_change_power_mode() [all …]
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D | ufshcd.h | 854 static inline int ufshcd_dme_set(struct ufs_hba *hba, u32 attr_sel, in ufshcd_dme_set() function
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