Searched refs:ucPllCntlFlag (Results 1 – 5 of 5) sorted by relevance
272 (uint32_t)(mpll_parameters.ucPllCntlFlag & in atomctrl_get_memory_pll_dividers_si()275 (uint32_t)((mpll_parameters.ucPllCntlFlag & in atomctrl_get_memory_pll_dividers_si()278 (uint32_t)((mpll_parameters.ucPllCntlFlag & in atomctrl_get_memory_pll_dividers_si()281 (uint32_t)((mpll_parameters.ucPllCntlFlag & in atomctrl_get_memory_pll_dividers_si()402 pll_patameters.ucPllCntlFlag; in atomctrl_get_engine_pll_dividers_vi()472 pll_patameters.ucPllCntlFlag; in atomctrl_get_dfs_pll_dividers_vi()
1092 dividers->flags = args.v6_out.ucPllCntlFlag; in amdgpu_atombios_get_clock_dividers()1135 (args.ucPllCntlFlag & MPLL_CNTL_FLAG_VCO_MODE_MASK); in amdgpu_atombios_get_memory_pll_dividers()1137 (args.ucPllCntlFlag & MPLL_CNTL_FLAG_BYPASS_DQ_PLL) ? 1 : 0; in amdgpu_atombios_get_memory_pll_dividers()1139 (args.ucPllCntlFlag & MPLL_CNTL_FLAG_QDR_ENABLE) ? 1 : 0; in amdgpu_atombios_get_memory_pll_dividers()1141 (args.ucPllCntlFlag & MPLL_CNTL_FLAG_AD_HALF_RATE) ? 1 : 0; in amdgpu_atombios_get_memory_pll_dividers()
2944 dividers->flags = args.v6_out.ucPllCntlFlag; in radeon_atom_get_clock_dividers()2987 (args.ucPllCntlFlag & MPLL_CNTL_FLAG_VCO_MODE_MASK); in radeon_atom_get_memory_pll_dividers()2989 (args.ucPllCntlFlag & MPLL_CNTL_FLAG_BYPASS_DQ_PLL) ? 1 : 0; in radeon_atom_get_memory_pll_dividers()2991 (args.ucPllCntlFlag & MPLL_CNTL_FLAG_QDR_ENABLE) ? 1 : 0; in radeon_atom_get_memory_pll_dividers()2993 (args.ucPllCntlFlag & MPLL_CNTL_FLAG_AD_HALF_RATE) ? 1 : 0; in radeon_atom_get_memory_pll_dividers()
527 UCHAR ucPllCntlFlag; //Output Flags: control flag member550 UCHAR ucPllCntlFlag; //Output: member
562 UCHAR ucPllCntlFlag; //Output Flags: control flag member612 UCHAR ucPllCntlFlag; //Output: member
