Searched refs:trigger_level (Results 1 – 3 of 3) sorted by relevance
455 u32 trigger_level, imr; in ath5k_hw_update_tx_triglevel() local463 trigger_level = AR5K_REG_MS(ath5k_hw_reg_read(ah, AR5K_TXCFG), in ath5k_hw_update_tx_triglevel()467 if (--trigger_level < AR5K_TUNE_MIN_TX_FIFO_THRES) in ath5k_hw_update_tx_triglevel()470 trigger_level += in ath5k_hw_update_tx_triglevel()471 ((AR5K_TUNE_MAX_TX_FIFO_THRES - trigger_level) / 2); in ath5k_hw_update_tx_triglevel()477 ath5k_hw_reg_write(ah, trigger_level, AR5K_TRIG_LVL); in ath5k_hw_update_tx_triglevel()480 AR5K_TXCFG_TXFULL, trigger_level); in ath5k_hw_update_tx_triglevel()
222 int trigger_level; member525 priv->trigger_level = in pch_uart_hal_set_fifo()529 priv->trigger_level = in pch_uart_hal_set_fifo()533 priv->trigger_level = in pch_uart_hal_set_fifo()537 priv->trigger_level = in pch_uart_hal_set_fifo()768 count = dma_push_rx(priv, priv->trigger_level); in pch_dma_rx_complete()859 sg_dma_len(sg) = priv->trigger_level; in dma_handle_rx()1272 int trigger_level; in pch_uart_startup() local1307 trigger_level = 1; in pch_uart_startup()1310 trigger_level = priv->fifo_size / 4; in pch_uart_startup()[all …]
56 The threshold and each trigger_level are set
