Searched refs:to_intel_crtc_state (Results 1 – 9 of 9) sorted by relevance
392 (new_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].new_state), 1); \409 (old_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].old_state), \410 (new_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].new_state), 1); \
1088 #define to_intel_crtc_state(x) container_of(x, struct intel_crtc_state, base) macro1480 return to_intel_crtc_state(drm_atomic_get_old_crtc_state(&state->base, in intel_atomic_get_old_crtc_state()1488 return to_intel_crtc_state(drm_atomic_get_new_crtc_state(&state->base, in intel_atomic_get_new_crtc_state()
440 return to_intel_crtc_state(crtc_state); in intel_atomic_get_crtc_state()
3146 to_intel_crtc_state(crtc->base.state); in intel_plane_disable_noatomic()5798 hsw_disable_ips(to_intel_crtc_state(crtc->state)); in intel_pre_disable_primary_noatomic()7092 intel_disable_shared_dpll(to_intel_crtc_state(crtc->state)); in intel_crtc_disable_noatomic()11773 to_intel_crtc_state(crtc_state); in intel_crtc_atomic_check()14698 to_intel_crtc_state(crtc->state); in intel_legacy_cursor_update()14737 new_crtc_state = to_intel_crtc_state(intel_crtc_duplicate_state(crtc)); in intel_legacy_cursor_update()16046 to_intel_crtc_state(crtc->base.state)->wm = crtc_state->wm; in sanitize_watermarks()16439 struct intel_crtc_state *crtc_state = to_intel_crtc_state(crtc->base.state); in intel_sanitize_crtc()16533 to_intel_crtc_state(crtc->base.state) : NULL; in intel_sanitize_encoder()16643 crtc_state = to_intel_crtc_state(crtc->base.state); in readout_plane_state()[all …]
1026 intel_crtc_state = to_intel_crtc_state(crtc_state); in intel_psr_fastset_force()
4101 crtc_state = to_intel_crtc_state(crtc->base.state); in intel_hdmi_reset_link()
4824 crtc_state = to_intel_crtc_state(crtc->base.state); in intel_dp_retrain_link()
2695 pipe_config = to_intel_crtc_state(intel_crtc->base.state); in intel_scaler_info()2734 pipe_config = to_intel_crtc_state(crtc->base.state); in i915_display_info()2969 to_intel_crtc_state(crtc->base.state); in i915_ddb_info()3022 if (to_intel_crtc_state(intel_crtc->base.state)->has_drrs) { in drrs_status_per_crtc()4182 crtc_state = to_intel_crtc_state(crtc->base.state); in i915_drrs_ctl_set()4258 crtc_state = to_intel_crtc_state(intel_crtc->base.state); in i915_fifo_underrun_reset_write()4529 crtc_state = to_intel_crtc_state(crtc->state); in i915_dsc_fec_support_show()
3785 crtc_state = to_intel_crtc_state(crtc->base.state); in intel_can_enable_sagv()3903 *alloc = to_intel_crtc_state(for_crtc->state)->wm.skl.ddb; in skl_ddb_get_pipe_allocation_limits()5814 crtc_state = to_intel_crtc_state(crtc->base.state); in skl_wm_get_hw_state()5833 struct intel_crtc_state *crtc_state = to_intel_crtc_state(crtc->base.state); in ilk_pipe_wm_get_hw_state()5997 to_intel_crtc_state(crtc->base.state); in g4x_wm_get_hw_state()6081 to_intel_crtc_state(crtc->base.state); in g4x_wm_sanitize()6114 to_intel_crtc_state(crtc->base.state); in g4x_wm_sanitize()6173 to_intel_crtc_state(crtc->base.state); in vlv_wm_get_hw_state()6234 to_intel_crtc_state(crtc->base.state); in vlv_wm_sanitize()6260 to_intel_crtc_state(crtc->base.state); in vlv_wm_sanitize()
