Searched refs:to_intel_atomic_state (Results 1 – 8 of 8) sorted by relevance
321 struct intel_atomic_state *intel_state = to_intel_atomic_state(drm_state); in intel_atomic_setup_scalers()426 struct intel_atomic_state *state = to_intel_atomic_state(s); in intel_atomic_state_clear()
997 to_intel_atomic_state(new_crtc_state->base.state); in intel_can_preload_luts()1009 to_intel_atomic_state(new_crtc_state->base.state); in chv_can_preload_luts()1028 to_intel_atomic_state(new_crtc_state->base.state); in glk_can_preload_luts()1078 to_intel_atomic_state(new_crtc_state->base.state); in intel_color_add_affected_planes()
202 to_intel_atomic_state(_new_plane_state->state); in intel_plane_atomic_check()
815 to_intel_atomic_state(state)->cdclk.force_min_cdclk_changed = true; in glk_force_audio_cdclk()816 to_intel_atomic_state(state)->cdclk.force_min_cdclk = in glk_force_audio_cdclk()
1086 #define to_intel_atomic_state(x) container_of(x, struct intel_atomic_state, base) macro
4251 to_intel_atomic_state(state)->skip_intermediate_wm = true; in __intel_display_resume()5906 intel_atomic_get_new_crtc_state(to_intel_atomic_state(state), in intel_post_plane_update()5953 to_intel_atomic_state(state); in intel_pre_plane_update()7073 dev_priv->display.crtc_disable(crtc_state, to_intel_atomic_state(state)); in intel_crtc_disable_noatomic()7336 to_intel_atomic_state(crtc_state->base.state); in hsw_compute_ips_config()9638 to_intel_atomic_state(crtc_state->base.state); in ironlake_crtc_compute_clock()10054 to_intel_atomic_state(crtc_state->base.state); in haswell_crtc_compute_clock()11688 struct intel_atomic_state *state = to_intel_atomic_state(crtc_state->base.state); in icl_check_nv12_planes()11760 to_intel_atomic_state(new_crtc_state->base.state); in c8_planes_changed()13615 struct intel_atomic_state *state = to_intel_atomic_state(_state); in intel_atomic_check()[all …]
65 struct intel_atomic_state *state = to_intel_atomic_state(s); in intel_atomic_get_shared_dpll_state()
1336 to_intel_atomic_state(crtc_state->base.state); in g4x_compute_pipe_wm()1427 to_intel_atomic_state(new_crtc_state->base.state); in g4x_compute_intermediate_wm()1855 to_intel_atomic_state(crtc_state->base.state); in vlv_compute_pipe_wm()2060 to_intel_atomic_state(new_crtc_state->base.state); in vlv_compute_intermediate_wm()2800 to_intel_atomic_state(crtc_state->base.state); in hsw_compute_linetime_wm()3202 to_intel_atomic_state(newstate->base.state); in ilk_compute_intermediate_wm()3867 struct intel_atomic_state *intel_state = to_intel_atomic_state(state); in skl_ddb_get_pipe_allocation_limits()4186 dotclk = to_intel_atomic_state(state)->cdclk.logical.cdclk; in skl_check_pipe_max_pixel_rate()5283 struct intel_atomic_state *state = to_intel_atomic_state(new_crtc_state->base.state); in skl_ddb_add_affected_planes()
