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Searched refs:tc_port (Results 1 – 7 of 7) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/i915/display/
Dintel_tc.c36 enum tc_port tc_port) in tc_port_to_fia() argument
45 return tc_port / 2; in tc_port_to_fia()
51 enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port); in intel_tc_port_get_lane_mask() local
60 return (lane_mask & DP_LANE_ASSIGNMENT_MASK(tc_port)) >> in intel_tc_port_get_lane_mask()
61 DP_LANE_ASSIGNMENT_SHIFT(tc_port); in intel_tc_port_get_lane_mask()
98 enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port); in intel_tc_port_set_fia_lane_count() local
107 val &= ~DFLEXDPMLE1_DPMLETC_MASK(tc_port); in intel_tc_port_set_fia_lane_count()
111 val |= lane_reversal ? DFLEXDPMLE1_DPMLETC_ML3(tc_port) : in intel_tc_port_set_fia_lane_count()
112 DFLEXDPMLE1_DPMLETC_ML0(tc_port); in intel_tc_port_set_fia_lane_count()
115 val |= lane_reversal ? DFLEXDPMLE1_DPMLETC_ML3_2(tc_port) : in intel_tc_port_set_fia_lane_count()
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Dintel_dpll_mgr.c2613 static enum tc_port icl_pll_id_to_tc_port(enum intel_dpll_id id) in icl_pll_id_to_tc_port()
2618 enum intel_dpll_id icl_tc_port_to_pll_id(enum tc_port tc_port) in icl_tc_port_to_pll_id() argument
2620 return tc_port + DPLL_ID_ICL_MGPLL1; in icl_tc_port_to_pll_id()
3047 enum tc_port tc_port = icl_pll_id_to_tc_port(id); in mg_pll_get_hw_state() local
3057 val = I915_READ(MG_PLL_ENABLE(tc_port)); in mg_pll_get_hw_state()
3061 hw_state->mg_refclkin_ctl = I915_READ(MG_REFCLKIN_CTL(tc_port)); in mg_pll_get_hw_state()
3065 I915_READ(MG_CLKTOP2_CORECLKCTL1(tc_port)); in mg_pll_get_hw_state()
3070 I915_READ(MG_CLKTOP2_HSCLKCTL(tc_port)); in mg_pll_get_hw_state()
3077 hw_state->mg_pll_div0 = I915_READ(MG_PLL_DIV0(tc_port)); in mg_pll_get_hw_state()
3078 hw_state->mg_pll_div1 = I915_READ(MG_PLL_DIV1(tc_port)); in mg_pll_get_hw_state()
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Dintel_dpll_mgr.h379 enum intel_dpll_id icl_tc_port_to_pll_id(enum tc_port tc_port);
Dintel_ddi.c2776 enum tc_port tc_port = intel_port_to_tc(dev_priv, in icl_dpclka_cfgcr0_clk_off() local
2779 return ICL_DPCLKA_CFGCR0_TC_CLK_OFF(tc_port); in icl_dpclka_cfgcr0_clk_off()
2996 enum tc_port tc_port = intel_port_to_tc(dev_priv, port); in icl_enable_phy_clock_gating() local
3000 if (tc_port == PORT_TC_NONE) in icl_enable_phy_clock_gating()
3013 val = I915_READ(MG_MISC_SUS0(tc_port)); in icl_enable_phy_clock_gating()
3021 I915_WRITE(MG_MISC_SUS0(tc_port), val); in icl_enable_phy_clock_gating()
3028 enum tc_port tc_port = intel_port_to_tc(dev_priv, port); in icl_disable_phy_clock_gating() local
3032 if (tc_port == PORT_TC_NONE) in icl_disable_phy_clock_gating()
3045 val = I915_READ(MG_MISC_SUS0(tc_port)); in icl_disable_phy_clock_gating()
3053 I915_WRITE(MG_MISC_SUS0(tc_port), val); in icl_disable_phy_clock_gating()
Dintel_display.h215 enum tc_port { enum
454 enum tc_port intel_port_to_tc(struct drm_i915_private *dev_priv,
Dintel_display.c6714 enum tc_port intel_port_to_tc(struct drm_i915_private *dev_priv, enum port port) in intel_port_to_tc()
/Linux-v5.4/drivers/gpu/drm/i915/
Di915_reg.h2149 #define MG_MISC_SUS0(tc_port) \ argument
2150 _MMIO(_PORT(tc_port, MG_MISC_SUS0_PORT1, MG_MISC_SUS0_PORT2))
2176 #define DFLEXDPMLE1_DPMLETC_MASK(tc_port) (0xf << (4 * (tc_port))) argument
2177 #define DFLEXDPMLE1_DPMLETC_ML0(tc_port) (1 << (4 * (tc_port))) argument
2178 #define DFLEXDPMLE1_DPMLETC_ML1_0(tc_port) (3 << (4 * (tc_port))) argument
2179 #define DFLEXDPMLE1_DPMLETC_ML3(tc_port) (8 << (4 * (tc_port))) argument
2180 #define DFLEXDPMLE1_DPMLETC_ML3_2(tc_port) (12 << (4 * (tc_port))) argument
2181 #define DFLEXDPMLE1_DPMLETC_ML3_0(tc_port) (15 << (4 * (tc_port))) argument
7425 #define GEN11_TC_HOTPLUG(tc_port) (1 << ((tc_port) + 16)) argument
7438 #define GEN11_TBT_HOTPLUG(tc_port) (1 << (tc_port)) argument
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