Searched refs:tR (Results 1 – 7 of 7) sorted by relevance
171 u16 tR; member
21 read registers (tR). If not present then a default of 20us is used.
19 read registers (tR). Required if property "gpios" is not used
301 timings->tR_max = 1000000ULL * onfi->tR; in onfi_fill_data_interface()
441 unsigned int tR; member2366 nfc_tmg.tR = TO_CYCLES(sdr->tWB_max, period_ns); in marvell_nfc_setup_data_interface()2368 nfc_tmg.tR = TO_CYCLES64(sdr->tWB_max + sdr->tR_max, in marvell_nfc_setup_data_interface()2370 if (nfc_tmg.tR + 3 > nfc_tmg.tCH) in marvell_nfc_setup_data_interface()2371 nfc_tmg.tR = nfc_tmg.tCH - 3; in marvell_nfc_setup_data_interface()2373 nfc_tmg.tR = 0; in marvell_nfc_setup_data_interface()2391 NDTR1_TR(nfc_tmg.tR); in marvell_nfc_setup_data_interface()
294 onfi->tR = le16_to_cpu(p->t_r); in nand_onfi_detect()
1542 tS, tR = self.dmesg[lp]['end'], self.dmesg[phase]['start']1543 tL = tR - tS1545 left = True if tR > tZero else False1705 tS = tR = False1712 if not tR and ps >= self.tResumed:1714 tR = True
