| /Linux-v5.4/Documentation/core-api/ |
| D | refcount-vs-atomic.rst | 42 stores (all po-earlier instructions) on the same CPU are completed
44 It also guarantees that all po-earlier stores on the same CPU
45 and all propagated stores from other CPUs must propagate to all
50 stores (all po-earlier instructions) on the same CPU are completed
52 stores on the same CPU and all propagated stores from other CPUs
58 stores (all po-later instructions) on the same CPU are
60 po-later stores on the same CPU must propagate to all other CPUs
67 then further stores are ordered against this operation.
68 Control dependency on stores are not implemented using any explicit
69 barriers, but rely on CPU not to speculate on stores. This is only
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| /Linux-v5.4/fs/fscache/ |
| D | page.c | 24 val = radix_tree_lookup(&cookie->stores, page->index); in __fscache_check_page_write()
75 val = radix_tree_lookup(&cookie->stores, page->index); in __fscache_maybe_release_page()
85 if (radix_tree_tag_get(&cookie->stores, page->index, in __fscache_maybe_release_page()
96 if (radix_tree_tag_get(&cookie->stores, page->index, in __fscache_maybe_release_page()
104 xpage = radix_tree_delete(&cookie->stores, page->index); in __fscache_maybe_release_page()
158 radix_tree_tag_clear(&cookie->stores, page->index, in fscache_end_page_write()
161 if (!radix_tree_tag_get(&cookie->stores, page->index, in fscache_end_page_write()
164 xpage = radix_tree_delete(&cookie->stores, page->index); in fscache_end_page_write()
168 val = radix_tree_lookup(&cookie->stores, page->index); in fscache_end_page_write()
838 n = radix_tree_gang_lookup_tag(&cookie->stores, results, 0, 1, in fscache_write_op()
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| /Linux-v5.4/fs/romfs/ |
| D | Kconfig | 20 # Select the backing stores to be supported
23 prompt "RomFS backing stores"
27 Select the backing stores to be supported.
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| /Linux-v5.4/tools/memory-model/Documentation/ |
| D | explanation.txt | 102 device, stores it in a buffer, and sets a flag to indicate the buffer
134 Thus, P0 stores the data in buf and then sets flag. Meanwhile, P1
140 This pattern of memory accesses, where one CPU stores values to two
197 it, as loads can obtain values only from earlier stores.
202 P1 must load 0 from buf before P0 stores 1 to it; otherwise r2
206 P0 stores 1 to buf before storing 1 to flag, since it executes
222 each CPU stores to its own shared location and then loads from the
270 W: P0 stores 1 to flag executes before
273 Z: P0 stores 1 to buf executes before
274 W: P0 stores 1 to flag.
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| D | recipes.txt | 46 tearing, load/store fusing, and invented loads and stores.
203 The MP pattern has one CPU execute a pair of stores to a pair of variables
310 The smp_wmb() macro orders prior stores against later stores, and the
354 second, while another CPU loads from the second variable and then stores
475 that one CPU first stores to one variable and then loads from a second,
476 while another CPU stores to the second variable and then loads from the
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| /Linux-v5.4/tools/lib/traceevent/Documentation/ |
| D | libtraceevent-field_read.txt | 20 raw _data_ and stores it in the _value_. The function sets the _value_ according
21 to the endianness of the raw data and the current machine and stores it in
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| /Linux-v5.4/Documentation/devicetree/bindings/mfd/ |
| D | 88pm860x.txt | 13 - marvell,88pm860x-slave-addr: 88pm860x are two chips solution. <reg> stores the I2C address
14 of one chip, and this property stores the I2C address of
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| /Linux-v5.4/tools/perf/Documentation/ |
| D | perf-mem.txt | 20 and stores are sampled. Use the -t option to limit to loads or stores.
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| /Linux-v5.4/arch/sparc/kernel/ |
| D | dtlb_prot.S | 20 membar #Sync ! Synchronize stores
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| /Linux-v5.4/Documentation/leds/ |
| D | ledtrig-transient.rst | 127 echo n > duration stores timer value to be used upon next
130 echo 0 > duration stores timer value to be used upon next
133 echo 1 > state stores desired transient state LED_FULL to be
135 echo 0 > state stores desired transient state LED_OFF to be
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| /Linux-v5.4/Documentation/devicetree/bindings/power/reset/ |
| D | nvmem-reboot-mode.txt | 4 and stores it in a NVMEM cell named "reboot-mode". Then the bootloader
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| D | syscon-reboot-mode.txt | 4 and stores it in a SYSCON mapped register. Then the bootloader
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| /Linux-v5.4/arch/mips/include/asm/ |
| D | mips-r2-to-r6-emul.h | 23 u64 stores; member
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| D | fpu_emulator.h | 27 unsigned long stores; member
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| /Linux-v5.4/arch/sparc/lib/ |
| D | M7memset.S | 167 ! Use long word stores.
179 and %o2, 63, %o3 ! %o3 = bytes left after blk stores.
187 ! initial cache-clearing stores
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| /Linux-v5.4/Documentation/ABI/testing/ |
| D | sysfs-class-extcon | 35 The /sys/class/extcon/.../state shows and stores the cable
76 The /sys/class/extcon/.../cable.x/state shows and stores the
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| D | sysfs-class-devfreq | 86 The /sys/class/devfreq/.../min_freq shows and stores
95 The /sys/class/devfreq/.../max_freq shows and stores
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| /Linux-v5.4/arch/mips/kernel/ |
| D | mips-r2-to-r6-emul.c | 1418 MIPS_R2_STATS(stores); in mipsr2_decoder()
1488 MIPS_R2_STATS(stores); in mipsr2_decoder()
1845 MIPS_R2_STATS(stores); in mipsr2_decoder()
1963 MIPS_R2_STATS(stores); in mipsr2_decoder()
2270 (unsigned long)__this_cpu_read(mipsr2emustats.stores), in mipsr2_emul_show()
2271 (unsigned long)__this_cpu_read(mipsr2bdemustats.stores)); in mipsr2_emul_show()
2326 __this_cpu_write((mipsr2emustats).stores, 0); in mipsr2_clear_show()
2327 __this_cpu_write((mipsr2bdemustats).stores, 0); in mipsr2_clear_show()
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| /Linux-v5.4/Documentation/filesystems/ext4/ |
| D | inodes.rst | 6 In a regular UNIX filesystem, the inode stores all the metadata
13 directory entry. (Compare all this to FAT, which stores all the file
56 inode flag is set, this inode stores an extended attribute value and
62 EA\_INODE inode flag is set, this inode stores an extended attribute
69 EA\_INODE inode flag is set, this inode stores an extended attribute
283 - Inode stores a large extended attribute value in its data blocks
331 stores an extended attribute value and this field contains the upper 32
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| /Linux-v5.4/Documentation/ |
| D | memory-barriers.txt | 179 Furthermore, the stores committed by a CPU to the memory system may not be
180 perceived by the loads made by another CPU in the same order as the stores were
249 (*) Overlapping loads and stores within a particular CPU will appear to be
266 (Loads and stores overlap if they are targeted at overlapping pieces of
277 (*) It _must_not_ be assumed that independent loads and stores will be issued
389 A write barrier is a partial ordering on stores only; it is not required
393 memory system as time progresses. All stores _before_ a write barrier
394 will occur _before_ all the stores after the write barrier.
410 only; it is not required to have any effect on stores, independent loads
414 committing sequences of stores to the memory system that the CPU being
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| /Linux-v5.4/Documentation/devicetree/bindings/powerpc/4xx/ |
| D | akebono.txt | 36 The Akebono board stores some board information such as the revision
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| /Linux-v5.4/arch/c6x/lib/ |
| D | divi.S | 23 ;; call to divu. It stores B3 in on the stack.
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| /Linux-v5.4/tools/testing/selftests/powerpc/copyloops/ |
| D | memcpy_64.S | 115 ld r9,0(r4) # 3+2n loads, 2+2n stores
127 0: ld r0,0(r4) # 4+2n loads, 3+2n stores
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| /Linux-v5.4/arch/powerpc/lib/ |
| D | memcpy_64.S | 115 ld r9,0(r4) # 3+2n loads, 2+2n stores
127 0: ld r0,0(r4) # 4+2n loads, 3+2n stores
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| /Linux-v5.4/Documentation/hwmon/ |
| D | w83l786ng.rst | 50 - this file stores PWM duty cycle or DC value (fan speed) in range:
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