Searched refs:spu_chnldata_RW (Results 1 – 6 of 6) sorted by relevance
41 ch0_data = ctx->csa.spu_chnldata_RW[0]; in gen_spu_event()42 ch1_data = ctx->csa.spu_chnldata_RW[1]; in gen_spu_event()43 ctx->csa.spu_chnldata_RW[0] |= event; in gen_spu_event()172 return ctx->csa.spu_chnldata_RW[3]; in spu_backing_signal1_read()179 ctx->csa.spu_chnldata_RW[3] |= data; in spu_backing_signal1_write()181 ctx->csa.spu_chnldata_RW[3] = data; in spu_backing_signal1_write()189 return ctx->csa.spu_chnldata_RW[4]; in spu_backing_signal2_read()196 ctx->csa.spu_chnldata_RW[4] |= data; in spu_backing_signal2_write()198 ctx->csa.spu_chnldata_RW[4] = data; in spu_backing_signal2_write()
626 csa->spu_chnldata_RW[1] = in_be64(&priv2->spu_chnldata_RW); in save_ch_part1()633 csa->spu_chnldata_RW[idx] = in_be64(&priv2->spu_chnldata_RW); in save_ch_part1()635 out_be64(&priv2->spu_chnldata_RW, 0UL); in save_ch_part1()653 csa->spu_mailbox_data[i] = in_be64(&priv2->spu_chnldata_RW); in save_spu_mb()1077 out_be64(&priv2->spu_chnldata_RW, 0UL); in reset_ch_part1()1084 out_be64(&priv2->spu_chnldata_RW, 0UL); in reset_ch_part1()1530 ch0_data = csa->spu_chnldata_RW[0]; in set_llr_event()1531 ch1_data = csa->spu_chnldata_RW[1]; in set_llr_event()1532 csa->spu_chnldata_RW[0] |= MFC_LLR_LOST_EVENT; in set_llr_event()1550 (csa->spu_chnldata_RW[1] & 0x20) && in restore_decr_wrapped()[all …]
980 data = ctx->csa.spu_chnldata_RW[3]; in __spufs_signal1_read()1117 data = ctx->csa.spu_chnldata_RW[4]; in __spufs_signal2_read()1866 return state->spu_chnldata_RW[0]; in spufs_event_status_get()2096 info.dma_info_status = ctx->csa.spu_chnldata_RW[24]; in __spufs_dma_info_read()2097 info.dma_info_stall_and_notify = ctx->csa.spu_chnldata_RW[25]; in __spufs_dma_info_read()2098 info.dma_info_atomic_command_status = ctx->csa.spu_chnldata_RW[27]; in __spufs_dma_info_read()
200 u64 spu_chnldata_RW; member235 u64 spu_chnldata_RW[32]; member
455 u64 spu_chnldata_RW; /* 0x4070 */ member
464 out_be64(&priv2->spu_chnldata_RW, 0); in spu_init_channels()
