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Searched refs:spll (Results 1 – 25 of 36) sorted by relevance

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/Linux-v5.4/drivers/gpu/drm/radeon/
Dradeon_clocks.c41 struct radeon_pll *spll = &rdev->clock.spll; in radeon_legacy_get_engine_clock() local
47 fb_div *= spll->reference_freq; in radeon_legacy_get_engine_clock()
110 struct radeon_pll *spll = &rdev->clock.spll; in radeon_read_clocks_OF() local
149 spll->reference_freq = mpll->reference_freq = p1pll->reference_freq; in radeon_read_clocks_OF()
150 spll->reference_div = mpll->reference_div = in radeon_read_clocks_OF()
185 struct radeon_pll *spll = &rdev->clock.spll; in radeon_get_clock_info() local
213 if (spll->reference_div < 2) in radeon_get_clock_info()
214 spll->reference_div = in radeon_get_clock_info()
219 mpll->reference_div = spll->reference_div; in radeon_get_clock_info()
232 spll->reference_freq = 1432; in radeon_get_clock_info()
[all …]
Dradeon_combios.c738 struct radeon_pll *spll = &rdev->clock.spll; in radeon_combios_get_clock_info() local
765 spll->reference_freq = RBIOS16(pll_info + 0x1a); in radeon_combios_get_clock_info()
766 spll->reference_div = RBIOS16(pll_info + 0x1c); in radeon_combios_get_clock_info()
767 spll->pll_out_min = RBIOS32(pll_info + 0x1e); in radeon_combios_get_clock_info()
768 spll->pll_out_max = RBIOS32(pll_info + 0x22); in radeon_combios_get_clock_info()
771 spll->pll_in_min = RBIOS32(pll_info + 0x48); in radeon_combios_get_clock_info()
772 spll->pll_in_max = RBIOS32(pll_info + 0x4c); in radeon_combios_get_clock_info()
775 spll->pll_in_min = 40; in radeon_combios_get_clock_info()
776 spll->pll_in_max = 500; in radeon_combios_get_clock_info()
Dradeon_atombios.c1148 struct radeon_pll *spll = &rdev->clock.spll; in radeon_atom_get_clock_info() local
1201 spll->reference_freq = in radeon_atom_get_clock_info()
1204 spll->reference_freq = in radeon_atom_get_clock_info()
1206 spll->reference_div = 0; in radeon_atom_get_clock_info()
1208 spll->pll_out_min = in radeon_atom_get_clock_info()
1210 spll->pll_out_max = in radeon_atom_get_clock_info()
1214 if (spll->pll_out_min == 0) { in radeon_atom_get_clock_info()
1216 spll->pll_out_min = 64800; in radeon_atom_get_clock_info()
1218 spll->pll_out_min = 20000; in radeon_atom_get_clock_info()
1221 spll->pll_in_min = in radeon_atom_get_clock_info()
[all …]
Drv740_dpm.c131 u32 reference_clock = rdev->clock.spll.reference_freq; in rv740_populate_sclk_value()
Drv6xx_dpm.c163 u32 ref_clk = rdev->clock.spll.reference_freq; in rv6xx_output_stepping()
428 u32 ref_clk = rdev->clock.spll.reference_freq; in rv6xx_compute_count_for_delay()
551 u32 ref_clk = rdev->clock.spll.reference_freq; in rv6xx_program_engine_spread_spectrum()
840 u32 ref_clk = rdev->clock.spll.reference_freq; in rv6xx_program_bsp()
Drs780_dpm.c993 u32 sclk = (rdev->clock.spll.reference_freq * current_fb_div) / in rs780_dpm_debugfs_print_current_performance_level()
1015 u32 sclk = (rdev->clock.spll.reference_freq * current_fb_div) / in rs780_dpm_get_current_sclk()
Drv730_dpm.c51 u32 reference_clock = rdev->clock.spll.reference_freq; in rv730_populate_sclk_value()
Dradeon_kms.c334 *value = rdev->clock.spll.reference_freq * 10; in radeon_info_ioctl()
Dradeon_uvd.c969 unsigned vco_freq, ref_freq = rdev->clock.spll.reference_freq; in radeon_uvd_calc_upll_dividers()
/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Damdgpu_atomfirmware.c346 struct amdgpu_pll *spll = &adev->clock.spll; in amdgpu_atomfirmware_get_clock_info() local
384 spll->reference_freq = le32_to_cpu(smu_info->v31.core_refclk_10khz); in amdgpu_atomfirmware_get_clock_info()
386 spll->reference_div = 0; in amdgpu_atomfirmware_get_clock_info()
387 spll->min_post_div = 1; in amdgpu_atomfirmware_get_clock_info()
388 spll->max_post_div = 1; in amdgpu_atomfirmware_get_clock_info()
389 spll->min_ref_div = 2; in amdgpu_atomfirmware_get_clock_info()
390 spll->max_ref_div = 0xff; in amdgpu_atomfirmware_get_clock_info()
391 spll->min_feedback_div = 4; in amdgpu_atomfirmware_get_clock_info()
392 spll->max_feedback_div = 0xff; in amdgpu_atomfirmware_get_clock_info()
393 spll->best_vco = 0; in amdgpu_atomfirmware_get_clock_info()
Damdgpu_atombios.c586 struct amdgpu_pll *spll = &adev->clock.spll; in amdgpu_atombios_get_clock_info() local
632 spll->reference_freq = in amdgpu_atombios_get_clock_info()
634 spll->reference_div = 0; in amdgpu_atombios_get_clock_info()
636 spll->pll_out_min = in amdgpu_atombios_get_clock_info()
638 spll->pll_out_max = in amdgpu_atombios_get_clock_info()
642 if (spll->pll_out_min == 0) in amdgpu_atombios_get_clock_info()
643 spll->pll_out_min = 64800; in amdgpu_atombios_get_clock_info()
645 spll->pll_in_min = in amdgpu_atombios_get_clock_info()
647 spll->pll_in_max = in amdgpu_atombios_get_clock_info()
650 spll->min_post_div = 1; in amdgpu_atombios_get_clock_info()
[all …]
Dnv.c127 return adev->clock.spll.reference_freq; in nv_get_xclk()
Damdgpu.h316 struct amdgpu_pll spll; member
Dcik.c843 u32 reference_clock = adev->clock.spll.reference_freq; in cik_get_xclk()
Dsoc15.c270 return adev->clock.spll.reference_freq; in soc15_get_xclk()
Dsi.c1216 u32 reference_clock = adev->clock.spll.reference_freq; in si_get_xclk()
Dvi.c329 u32 reference_clock = adev->clock.spll.reference_freq; in vi_get_xclk()
/Linux-v5.4/drivers/clk/microchip/
Dclk-core.c733 struct pic32_sys_pll *spll; in pic32_spll_clk_register() local
736 spll = devm_kzalloc(core->dev, sizeof(*spll), GFP_KERNEL); in pic32_spll_clk_register()
737 if (!spll) in pic32_spll_clk_register()
740 spll->core = core; in pic32_spll_clk_register()
741 spll->hw.init = &data->init_data; in pic32_spll_clk_register()
742 spll->ctrl_reg = data->ctrl_reg + core->iobase; in pic32_spll_clk_register()
743 spll->status_reg = data->status_reg + core->iobase; in pic32_spll_clk_register()
744 spll->lock_mask = data->lock_mask; in pic32_spll_clk_register()
747 spll->idiv = (readl(spll->ctrl_reg) >> PLL_IDIV_SHIFT) & PLL_IDIV_MASK; in pic32_spll_clk_register()
748 spll->idiv += 1; in pic32_spll_clk_register()
[all …]
/Linux-v5.4/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
Dnv40.c36 u32 spll; member
175 clk->spll = 0xc0000000 | (log2P << 16) | (N1 << 8) | M1; in nv40_clk_calc()
178 clk->spll = 0x00000000; in nv40_clk_calc()
193 nvkm_mask(device, 0x004008, 0xc007ffff, clk->spll); in nv40_clk_prog()
Dnv50.c474 clk_mask(hwsq, spll[0], 0xc03f0100, (P1 << 19) | (P1 << 16)); in nv50_clk_calc()
481 clk_mask(hwsq, spll[0], 0xc03f0100, in nv50_clk_calc()
483 clk_mask(hwsq, spll[1], 0x0000ffff, (N << 8) | M); in nv50_clk_calc()
/Linux-v5.4/Documentation/devicetree/bindings/clock/
Dimx31-clock.txt19 spll 4
/Linux-v5.4/drivers/clk/imx/
Dclk-imx31.c40 dummy, ckih, ckil, mpll, spll, upll, mcu_main, hsp, ahb, nfc, ipg, enumerator
70 clk[spll] = imx_clk_pllv1(IMX_PLLV1_IMX31, "spll", "ckih", base + MXC_CCM_SRPCTL); in _mx31_clocks_init()
/Linux-v5.4/drivers/gpu/drm/i915/display/
Dintel_dpll_mgr.h177 u32 spll; member
Dintel_dpll_mgr.c514 I915_WRITE(SPLL_CTL, pll->state.hw_state.spll); in hsw_ddi_spll_enable()
589 hw_state->spll = val; in hsw_ddi_spll_get_hw_state()
890 crtc_state->dpll_hw_state.spll = in hsw_get_dpll()
915 hw_state->wrpll, hw_state->spll); in hsw_dump_hw_state()
/Linux-v5.4/drivers/clk/samsung/
Dclk-exynos5420.c149 apll, cpll, dpll, epll, rpll, ipll, spll, vpll, mpll, enumerator
1453 [spll] = PLL(pll_2550, CLK_FOUT_SPLL, "fout_spll", "fin_pll", SPLL_LOCK,

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