Searched refs:socclk (Results 1 – 9 of 9) sorted by relevance
127 float socclk; member564 float socclk; /*MHz*/ member
116 .socclk = 208, /*MHz*/484 input.clks_cfg.socclk_mhz = v->socclk; in dcn_bw_calc_rq_dlg_ttu()769 v->socclk = dc->dcn_soc->socclk; in dcn_validate_bandwidth()1502 socclk_khz = dc->dcn_soc->socclk * 1000; in dcn_bw_notify_pplib_of_wm_ranges()1607 dc->dcn_soc->socclk * 1000, in dcn_bw_sync_calcs_and_dml()
1337 …clock_change_latency + v->write_back_latency + v->writeback_chunk_size * 1024.0 / 32.0 / v->socclk; in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation()
548 smu->smu_table.boot_values.socclk = 0; in smu_v11_0_get_vbios_bootup_values()563 smu->smu_table.boot_values.socclk = 0; in smu_v11_0_get_vbios_bootup_values()597 …smu->smu_table.boot_values.socclk = le32_to_cpu(output->atom_smu_outputclkfreq.smu_clock_freq_hz) … in smu_v11_0_get_clk_info_from_vbios()996 max_sustainable_clocks->soc_clock = smu->smu_table.boot_values.socclk / 100; in smu_v11_0_init_max_sustainable_clocks()
251 clock_limit = smu->smu_table.boot_values.socclk; in smu_get_dpm_freq_range()
424 single_dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.socclk / 100; in arcturus_set_default_dpm_table()
733 single_dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.socclk / 100; in vega20_set_default_dpm_table()
214 uint32_t socclk; member
517 uint16_t virtual_voltage_id, int32_t *socclk) in vega10_get_socclk_for_voltage_evv() argument539 *socclk = table_info->vdd_dep_on_socclk->entries[entry_id].clk; in vega10_get_socclk_for_voltage_evv()
