| /Linux-v5.4/arch/powerpc/mm/ |
| D | slice.c | 34 static void slice_print_mask(const char *label, const struct slice_mask *mask) in slice_print_mask()
48 static void slice_print_mask(const char *label, const struct slice_mask *mask) {} in slice_print_mask()
61 struct slice_mask *ret) in slice_range_to_mask()
117 static void slice_mask_for_free(struct mm_struct *mm, struct slice_mask *ret, in slice_mask_for_free()
139 const struct slice_mask *available, in slice_check_range_fits()
188 const struct slice_mask *mask, int psize) in slice_convert()
193 struct slice_mask *psize_mask, *old_mask; in slice_convert()
262 const struct slice_mask *available, in slice_scan_available()
280 const struct slice_mask *available, in slice_find_area_bottomup()
326 const struct slice_mask *available, in slice_find_area_topdown()
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| /Linux-v5.4/drivers/gpu/drm/i915/gt/ |
| D | intel_sseu.h | 20 u8 slice_mask; member
47 u8 slice_mask; member
57 .slice_mask = sseu->slice_mask, in intel_sseu_from_device_info()
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| D | intel_sseu.c | 65 ctx_sseu.slice_mask = 0x1; in intel_sseu_make_rpcs()
69 slices = hweight8(ctx_sseu.slice_mask); in intel_sseu_make_rpcs()
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| D | intel_engine_types.h | 588 1 : RUNTIME_INFO(dev_priv__)->sseu.slice_mask)
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| D | intel_workarounds.c | 787 if (INTEL_GEN(i915) >= 10 && is_power_of_2(sseu->slice_mask)) { in wa_init_mcr()
798 slice = fls(sseu->slice_mask) - 1; in wa_init_mcr()
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| /Linux-v5.4/arch/powerpc/include/asm/nohash/32/ |
| D | mmu-8xx.h | 204 struct slice_mask { struct
218 struct slice_mask mask_base_psize; /* 4k or 16k */ argument
219 struct slice_mask mask_512k;
220 struct slice_mask mask_8m;
256 static inline struct slice_mask *slice_mask_for_size(mm_context_t *ctx, int psize) in slice_mask_for_size()
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| /Linux-v5.4/drivers/gpu/drm/i915/ |
| D | intel_device_info.c | 93 hweight8(sseu->slice_mask), sseu->slice_mask); in sseu_dump()
214 sseu->slice_mask |= BIT(s); in gen11_sseu_info_init()
239 sseu->slice_mask = (fuse2 & GEN10_F2_S_ENA_MASK) >> in gen10_sseu_info_init()
316 sseu->slice_mask = BIT(0); in cherryview_sseu_info_init()
372 sseu->slice_mask = (fuse2 & GEN8_F2_S_ENA_MASK) >> GEN8_F2_S_ENA_SHIFT; in gen9_sseu_info_init()
392 if (!(sseu->slice_mask & BIT(s))) in gen9_sseu_info_init()
446 !IS_GEN9_LP(dev_priv) && hweight8(sseu->slice_mask) > 1; in gen9_sseu_info_init()
475 sseu->slice_mask = (fuse2 & GEN8_F2_S_ENA_MASK) >> GEN8_F2_S_ENA_SHIFT; in broadwell_sseu_info_init()
501 if (!(sseu->slice_mask & BIT(s))) in broadwell_sseu_info_init()
546 sseu->has_slice_pg = hweight8(sseu->slice_mask) > 1; in broadwell_sseu_info_init()
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| D | i915_query.c | 50 BUILD_BUG_ON(sizeof(u8) != sizeof(sseu->slice_mask)); in query_topology_info()
52 slice_length = sizeof(sseu->slice_mask); in query_topology_info()
81 &sseu->slice_mask, slice_length)) in query_topology_info()
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| D | i915_getparam.c | 144 value = sseu->slice_mask; in i915_getparam_ioctl()
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| D | i915_debugfs.c | 3748 sseu->slice_mask = BIT(0); in cherryview_sseu_device_status()
3796 sseu->slice_mask |= BIT(s); in gen10_sseu_device_status()
3845 sseu->slice_mask |= BIT(s); in gen9_sseu_device_status()
3879 sseu->slice_mask = slice_info & GEN8_LSLICESTAT_MASK; in broadwell_sseu_device_status()
3881 if (sseu->slice_mask) { in broadwell_sseu_device_status()
3884 for (s = 0; s < fls(sseu->slice_mask); s++) { in broadwell_sseu_device_status()
3892 for (s = 0; s < fls(sseu->slice_mask); s++) { in broadwell_sseu_device_status()
3909 sseu->slice_mask); in i915_print_sseu_info()
3911 hweight8(sseu->slice_mask)); in i915_print_sseu_info()
3914 for (s = 0; s < fls(sseu->slice_mask); s++) { in i915_print_sseu_info()
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| /Linux-v5.4/arch/powerpc/include/asm/book3s/64/ |
| D | mmu-hash.h | 693 struct slice_mask { struct
706 struct slice_mask mask_64k; argument
708 struct slice_mask mask_4k;
710 struct slice_mask mask_16m;
711 struct slice_mask mask_16g;
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| D | mmu.h | 172 static inline struct slice_mask *slice_mask_for_size(mm_context_t *ctx, int psize) in slice_mask_for_size()
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| /Linux-v5.4/drivers/crypto/qat/qat_common/ |
| D | icp_qat_fw_loader_handle.h | 62 unsigned int slice_mask; member
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| D | qat_hal.c | 321 ae_reset_csr |= handle->hal_handle->slice_mask << RST_CSR_QAT_LSB; in qat_hal_reset()
493 ae_reset_csr &= ~(handle->hal_handle->slice_mask << RST_CSR_QAT_LSB); in qat_hal_clr_reset()
500 (handle->hal_handle->slice_mask << RST_CSR_QAT_LSB)) & csr); in qat_hal_clr_reset()
504 clk_csr |= handle->hal_handle->slice_mask << 20; in qat_hal_clr_reset()
731 handle->hal_handle->slice_mask = hw_data->accel_mask; in qat_hal_init()
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| /Linux-v5.4/drivers/gpu/drm/i915/gem/ |
| D | i915_gem_context.c | 1212 if (!user->slice_mask || !user->subslice_mask || in user_to_context_sseu()
1224 if (overflows_type(user->slice_mask, context->slice_mask) || in user_to_context_sseu()
1233 if (user->slice_mask & ~device->slice_mask) in user_to_context_sseu()
1242 context->slice_mask = user->slice_mask; in user_to_context_sseu()
1249 unsigned int hw_s = hweight8(device->slice_mask); in user_to_context_sseu()
1251 unsigned int req_s = hweight8(context->slice_mask); in user_to_context_sseu()
2196 user_sseu.slice_mask = ce->sseu.slice_mask; in get_sseu()
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| /Linux-v5.4/drivers/gpu/drm/i915/gem/selftests/ |
| D | i915_gem_context.c | 839 unsigned int slices = hweight32(ce->engine->sseu.slice_mask); in __sseu_finish()
895 hweight32(sseu.slice_mask), spin); in __sseu_test()
925 if (hweight32(engine->sseu.slice_mask) < 2) in __igt_ctx_sseu()
933 pg_sseu.slice_mask = 1; in __igt_ctx_sseu()
938 name, flags, hweight32(engine->sseu.slice_mask), in __igt_ctx_sseu()
939 hweight32(pg_sseu.slice_mask)); in __igt_ctx_sseu()
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| /Linux-v5.4/drivers/gpu/drm/i915/gt/uc/ |
| D | intel_guc_ads.c | 101 blob->system_info.slice_enabled = hweight8(RUNTIME_INFO(dev_priv)->sseu.slice_mask); in __guc_ads_init()
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| /Linux-v5.4/include/uapi/drm/ |
| D | i915_drm.h | 1610 __u64 slice_mask; member
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| /Linux-v5.4/tools/include/uapi/drm/ |
| D | i915_drm.h | 1610 __u64 slice_mask; member
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