| /Linux-v5.4/crypto/ |
| D | simd.c | 240 struct simd_skcipher_alg *simd; in simd_register_skciphers_compat() local
252 simd = simd_skcipher_create_compat(algname, drvname, basename); in simd_register_skciphers_compat()
253 err = PTR_ERR(simd); in simd_register_skciphers_compat()
254 if (IS_ERR(simd)) in simd_register_skciphers_compat()
256 simd_algs[i] = simd; in simd_register_skciphers_compat()
490 struct simd_aead_alg *simd; in simd_register_aeads_compat() local
502 simd = simd_aead_create_compat(algname, drvname, basename); in simd_register_aeads_compat()
503 err = PTR_ERR(simd); in simd_register_aeads_compat()
504 if (IS_ERR(simd)) in simd_register_aeads_compat()
506 simd_algs[i] = simd; in simd_register_aeads_compat()
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| D | Makefile | 189 crypto_simd-y := simd.o
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| /Linux-v5.4/include/asm-generic/ |
| D | Kbuild | 7 mandatory-y += simd.h
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| /Linux-v5.4/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_gfx.h | 190 void (*read_wave_data)(struct amdgpu_device *adev, uint32_t simd,
192 void (*read_wave_vgprs)(struct amdgpu_device *adev, uint32_t simd,
195 void (*read_wave_sgprs)(struct amdgpu_device *adev, uint32_t simd,
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| D | amdgpu_debugfs.c | 623 uint32_t offset, se, sh, cu, wave, simd, data[32]; in amdgpu_debugfs_wave_read() local
634 simd = (*pos & GENMASK_ULL(44, 37)) >> 37; in amdgpu_debugfs_wave_read()
642 adev->gfx.funcs->read_wave_data(adev, simd, wave, data, &x); in amdgpu_debugfs_wave_read()
695 uint32_t offset, se, sh, cu, wave, simd, thread, bank, *data; in amdgpu_debugfs_gpr_read() local
706 simd = (*pos & GENMASK_ULL(51, 44)) >> 44; in amdgpu_debugfs_gpr_read()
720 adev->gfx.funcs->read_wave_vgprs(adev, simd, wave, thread, offset, size>>2, data); in amdgpu_debugfs_gpr_read()
723 adev->gfx.funcs->read_wave_sgprs(adev, simd, wave, offset, size>>2, data); in amdgpu_debugfs_gpr_read()
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| D | gfx_v6_0.c | 2987 static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t ad… in wave_read_ind() argument
2991 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_ind()
2997 static void wave_read_regs(struct amdgpu_device *adev, uint32_t simd, in wave_read_regs() argument
3003 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_regs()
3012 static void gfx_v6_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint3… in gfx_v6_0_read_wave_data() argument
3016 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); in gfx_v6_0_read_wave_data()
3017 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); in gfx_v6_0_read_wave_data()
3018 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v6_0_read_wave_data()
3019 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO); in gfx_v6_0_read_wave_data()
3020 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI); in gfx_v6_0_read_wave_data()
[all …]
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| D | gfx_v7_0.c | 4141 static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t ad… in wave_read_ind() argument
4145 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_ind()
4151 static void wave_read_regs(struct amdgpu_device *adev, uint32_t simd, in wave_read_regs() argument
4157 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_regs()
4166 static void gfx_v7_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint3… in gfx_v7_0_read_wave_data() argument
4170 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); in gfx_v7_0_read_wave_data()
4171 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); in gfx_v7_0_read_wave_data()
4172 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v7_0_read_wave_data()
4173 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO); in gfx_v7_0_read_wave_data()
4174 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI); in gfx_v7_0_read_wave_data()
[all …]
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| D | gfx_v9_0.c | 1781 static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t ad… in wave_read_ind() argument
1785 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_ind()
1791 static void wave_read_regs(struct amdgpu_device *adev, uint32_t simd, in wave_read_regs() argument
1797 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_regs()
1806 static void gfx_v9_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint3… in gfx_v9_0_read_wave_data() argument
1810 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); in gfx_v9_0_read_wave_data()
1811 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); in gfx_v9_0_read_wave_data()
1812 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v9_0_read_wave_data()
1813 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO); in gfx_v9_0_read_wave_data()
1814 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI); in gfx_v9_0_read_wave_data()
[all …]
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| D | gfx_v8_0.c | 5241 static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t ad… in wave_read_ind() argument
5245 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_ind()
5251 static void wave_read_regs(struct amdgpu_device *adev, uint32_t simd, in wave_read_regs() argument
5257 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_regs()
5266 static void gfx_v8_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint3… in gfx_v8_0_read_wave_data() argument
5270 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); in gfx_v8_0_read_wave_data()
5271 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); in gfx_v8_0_read_wave_data()
5272 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v8_0_read_wave_data()
5273 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO); in gfx_v8_0_read_wave_data()
5274 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI); in gfx_v8_0_read_wave_data()
[all …]
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| D | gfx_v10_0.c | 1131 static void gfx_v10_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint… in gfx_v10_0_read_wave_data() argument
1136 WARN_ON(simd != 0); in gfx_v10_0_read_wave_data()
1157 static void gfx_v10_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t simd, in gfx_v10_0_read_wave_sgprs() argument
1161 WARN_ON(simd != 0); in gfx_v10_0_read_wave_sgprs()
1168 static void gfx_v10_0_read_wave_vgprs(struct amdgpu_device *adev, uint32_t simd, in gfx_v10_0_read_wave_vgprs() argument
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| /Linux-v5.4/arch/arm/crypto/ |
| D | aes-neonbs-glue.c | 512 struct simd_skcipher_alg *simd; in aes_init() local
533 simd = simd_skcipher_create_compat(algname, drvname, basename); in aes_init()
534 err = PTR_ERR(simd); in aes_init()
535 if (IS_ERR(simd)) in aes_init()
538 aes_simd_algs[i] = simd; in aes_init()
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| D | aes-ce-glue.c | 706 struct simd_skcipher_alg *simd; in aes_init() local
724 simd = simd_skcipher_create_compat(algname, drvname, basename); in aes_init()
725 err = PTR_ERR(simd); in aes_init()
726 if (IS_ERR(simd)) in aes_init()
729 aes_simd_algs[i] = simd; in aes_init()
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| /Linux-v5.4/arch/arm64/crypto/ |
| D | aes-neonbs-glue.c | 529 struct simd_skcipher_alg *simd; in aes_init() local
550 simd = simd_skcipher_create_compat(algname, drvname, basename); in aes_init()
551 err = PTR_ERR(simd); in aes_init()
552 if (IS_ERR(simd)) in aes_init()
555 aes_simd_algs[i] = simd; in aes_init()
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| D | aes-glue.c | 1028 struct simd_skcipher_alg *simd; in aes_init() local
1050 simd = simd_skcipher_create_compat(algname, drvname, basename); in aes_init()
1051 err = PTR_ERR(simd); in aes_init()
1052 if (IS_ERR(simd)) in aes_init()
1055 aes_simd_algs[i] = simd; in aes_init()
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