Searched refs:set_wptr (Results 1 – 24 of 24) sorted by relevance
| /Linux-v5.4/drivers/gpu/drm/radeon/ |
| D | radeon_asic.c | 195 .set_wptr = &r100_gfx_set_wptr,
345 .set_wptr = &r100_gfx_set_wptr,
359 .set_wptr = &r100_gfx_set_wptr,
916 .set_wptr = &r600_gfx_set_wptr,
929 .set_wptr = &r600_dma_set_wptr,
1014 .set_wptr = &uvd_v1_0_set_wptr,
1213 .set_wptr = &uvd_v1_0_set_wptr,
1320 .set_wptr = &r600_gfx_set_wptr,
1333 .set_wptr = &r600_dma_set_wptr,
1629 .set_wptr = &cayman_gfx_set_wptr,
[all …]
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| D | radeon.h | 1814 void (*set_wptr)(struct radeon_device *rdev, struct radeon_ring *ring); member
2724 #define radeon_ring_set_wptr(rdev, r) (rdev)->asic->ring[(r)->idx]->set_wptr((rdev), (r))
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| /Linux-v5.4/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_ring.h | 124 void (*set_wptr)(struct amdgpu_ring *ring); member
237 #define amdgpu_ring_set_wptr(r) (r)->funcs->set_wptr((r))
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| D | vce_v3_0.c | 900 .set_wptr = vce_v3_0_ring_set_wptr,
924 .set_wptr = vce_v3_0_ring_set_wptr,
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| D | uvd_v6_0.c | 1522 .set_wptr = uvd_v6_0_ring_set_wptr,
1548 .set_wptr = uvd_v6_0_ring_set_wptr,
1577 .set_wptr = uvd_v6_0_enc_ring_set_wptr,
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| D | vcn_v2_5.c | 1008 .set_wptr = vcn_v2_5_dec_ring_set_wptr,
1108 .set_wptr = vcn_v2_5_enc_ring_set_wptr,
1187 .set_wptr = vcn_v2_5_jpeg_ring_set_wptr,
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| D | vce_v2_0.c | 611 .set_wptr = vce_v2_0_ring_set_wptr,
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| D | sdma_v4_0.c | 2262 .set_wptr = sdma_v4_0_ring_set_wptr,
2298 .set_wptr = sdma_v4_0_ring_set_wptr,
2330 .set_wptr = sdma_v4_0_page_ring_set_wptr,
2362 .set_wptr = sdma_v4_0_page_ring_set_wptr,
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| D | uvd_v4_2.c | 747 .set_wptr = uvd_v4_2_ring_set_wptr,
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| D | uvd_v5_0.c | 856 .set_wptr = uvd_v5_0_ring_set_wptr,
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| D | vcn_v2_0.c | 2177 .set_wptr = vcn_v2_0_dec_ring_set_wptr,
2208 .set_wptr = vcn_v2_0_enc_ring_set_wptr,
2237 .set_wptr = vcn_v2_0_jpeg_ring_set_wptr,
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| D | vcn_v1_0.c | 2206 .set_wptr = vcn_v1_0_dec_ring_set_wptr,
2240 .set_wptr = vcn_v1_0_enc_ring_set_wptr,
2273 .set_wptr = vcn_v1_0_jpeg_ring_set_wptr,
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| D | si_dma.c | 726 .set_wptr = si_dma_ring_set_wptr,
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| D | uvd_v7_0.c | 1780 .set_wptr = uvd_v7_0_ring_set_wptr,
1813 .set_wptr = uvd_v7_0_enc_ring_set_wptr,
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| D | sdma_v2_4.c | 1142 .set_wptr = sdma_v2_4_ring_set_wptr,
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| D | cik_sdma.c | 1255 .set_wptr = cik_sdma_ring_set_wptr,
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| D | vce_v4_0.c | 1076 .set_wptr = vce_v4_0_ring_set_wptr,
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| D | sdma_v3_0.c | 1580 .set_wptr = sdma_v3_0_ring_set_wptr,
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| D | sdma_v5_0.c | 1593 .set_wptr = sdma_v5_0_ring_set_wptr,
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| D | gfx_v6_0.c | 3494 .set_wptr = gfx_v6_0_ring_set_wptr_gfx,
3519 .set_wptr = gfx_v6_0_ring_set_wptr_compute,
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| D | gfx_v10_0.c | 5162 .set_wptr = gfx_v10_0_ring_set_wptr_gfx,
5214 .set_wptr = gfx_v10_0_ring_set_wptr_compute,
5248 .set_wptr = gfx_v10_0_ring_set_wptr_compute,
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| D | gfx_v9_0.c | 6209 .set_wptr = gfx_v9_0_ring_set_wptr_gfx,
6260 .set_wptr = gfx_v9_0_ring_set_wptr_compute,
6295 .set_wptr = gfx_v9_0_ring_set_wptr_compute,
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| D | gfx_v7_0.c | 5005 .set_wptr = gfx_v7_0_ring_set_wptr_gfx,
5037 .set_wptr = gfx_v7_0_ring_set_wptr_compute,
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| D | gfx_v8_0.c | 6924 .set_wptr = gfx_v8_0_ring_set_wptr_gfx,
6969 .set_wptr = gfx_v8_0_ring_set_wptr_compute,
6999 .set_wptr = gfx_v8_0_ring_set_wptr_compute,
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