| /Linux-v5.4/drivers/clk/ |
| D | clk-composite.c | 29 return mux_ops->set_parent(mux_hw, index); in clk_composite_set_parent()
64 mux_hw && mux_ops && mux_ops->set_parent) { in clk_composite_determine_rate()
160 mux_ops->set_parent(mux_hw, index); in clk_composite_set_rate_and_parent()
162 mux_ops->set_parent(mux_hw, index); in clk_composite_set_rate_and_parent()
236 if (mux_ops->set_parent) in clk_hw_register_composite()
237 clk_composite_ops->set_parent = clk_composite_set_parent; in clk_hw_register_composite()
271 if (mux_ops->set_parent && rate_ops->set_rate) in clk_hw_register_composite()
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| /Linux-v5.4/drivers/clk/mediatek/ |
| D | clk-mux.c | 134 .set_parent = mtk_clk_mux_set_parent_lock,
139 .set_parent = mtk_clk_mux_set_parent_setclr_lock,
147 .set_parent = mtk_clk_mux_set_parent_lock,
155 .set_parent = mtk_clk_mux_set_parent_setclr_lock,
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| /Linux-v5.4/drivers/clk/tegra/ |
| D | clk-periph.c | 32 return mux_ops->set_parent(mux_hw, index); in clk_periph_set_parent()
104 .set_parent = clk_periph_set_parent,
115 .set_parent = clk_periph_set_parent,
123 .set_parent = clk_periph_set_parent,
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| D | clk-super.c | 115 .set_parent = clk_super_set_parent,
153 .set_parent = clk_super_set_parent,
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| /Linux-v5.4/drivers/clk/actions/ |
| D | owl-composite.c | 147 .set_parent = owl_comp_set_parent,
164 .set_parent = owl_comp_set_parent,
193 .set_parent = owl_comp_set_parent,
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| D | owl-mux.c | 58 .set_parent = owl_mux_set_parent,
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| /Linux-v5.4/drivers/clk/ti/ |
| D | dpll.c | 38 .set_parent = &omap3_noncore_dpll_set_parent,
63 .set_parent = &omap3_noncore_dpll_set_parent,
76 .set_parent = &omap3_noncore_dpll_set_parent,
117 .set_parent = &omap3_noncore_dpll_set_parent,
129 .set_parent = &omap3_noncore_dpll_set_parent,
141 .set_parent = &omap3_noncore_dpll_set_parent,
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| /Linux-v5.4/drivers/clk/versatile/ |
| D | clk-sp810.c | 67 .set_parent = clk_sp810_timerclken_set_parent,
128 init.ops->set_parent(&sp810->timerclken[i].hw, 1); in clk_sp810_of_setup()
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| /Linux-v5.4/drivers/clk/pxa/ |
| D | clk-pxa.h | 24 .set_parent = dummy_clk_set_parent, \
75 .set_parent = name ## _set_parent, \
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| /Linux-v5.4/drivers/sh/clk/ |
| D | core.c | 523 if (clk->ops->set_parent) in clk_set_parent()
524 ret = clk->ops->set_parent(clk, parent); in clk_set_parent()
580 if (likely(clkp->ops->set_parent)) in clks_core_resume()
581 clkp->ops->set_parent(clkp, in clks_core_resume()
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| /Linux-v5.4/drivers/clk/qcom/ |
| D | clk-rcg2.c | 357 .set_parent = clk_rcg2_set_parent,
368 .set_parent = clk_rcg2_set_parent,
495 .set_parent = clk_rcg2_set_parent,
553 .set_parent = clk_rcg2_set_parent,
623 .set_parent = clk_rcg2_set_parent,
713 .set_parent = clk_rcg2_set_parent,
800 .set_parent = clk_rcg2_set_parent,
938 .set_parent = clk_rcg2_set_parent,
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| D | clk-rcg.c | 812 .set_parent = clk_rcg_set_parent,
823 .set_parent = clk_rcg_set_parent,
834 .set_parent = clk_rcg_set_parent,
846 .set_parent = clk_rcg_set_parent,
858 .set_parent = clk_rcg_set_parent,
870 .set_parent = clk_rcg_set_parent,
882 .set_parent = clk_dyn_rcg_set_parent,
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| D | clk-regmap-mux.c | 54 .set_parent = mux_set_parent,
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| D | krait-cc.c | 43 ret = krait_mux_clk_ops.set_parent(&mux->hw, mux->safe_sel); in krait_notifier_cb()
52 ret = krait_mux_clk_ops.set_parent(&mux->hw, in krait_notifier_cb()
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| /Linux-v5.4/drivers/clk/imx/ |
| D | clk-busy.c | 142 ret = busy->mux_ops->set_parent(&busy->mux.hw, index); in clk_busy_mux_set_parent()
151 .set_parent = clk_busy_mux_set_parent,
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| /Linux-v5.4/sound/soc/codecs/ |
| D | tlv320aic32x4-clk.c | 264 .set_parent = clk_aic32x4_pll_set_parent,
288 .set_parent = clk_aic32x4_codec_clkin_set_parent,
375 .set_parent = clk_aic32x4_bdiv_set_parent,
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| /Linux-v5.4/drivers/clk/socfpga/ |
| D | clk-gate.c | 168 .set_parent = socfpga_clk_set_parent,
235 ops->set_parent = NULL; in socfpga_gate_init()
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| /Linux-v5.4/drivers/clk/rockchip/ |
| D | clk-pll.c | 198 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_SLOW); in rockchip_rk3036_pll_set_params()
232 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_NORM); in rockchip_rk3036_pll_set_params()
429 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_SLOW); in rockchip_rk3066_pll_set_params()
465 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_NORM); in rockchip_rk3066_pll_set_params()
675 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_SLOW); in rockchip_rk3399_pll_set_params()
711 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_NORM); in rockchip_rk3399_pll_set_params()
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| D | clk-muxgrf.c | 52 .set_parent = rockchip_muxgrf_set_parent,
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| /Linux-v5.4/drivers/clk/sprd/ |
| D | composite.c | 54 .set_parent = sprd_comp_set_parent,
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| D | mux.c | 73 .set_parent = sprd_mux_set_parent,
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| /Linux-v5.4/drivers/clk/at91/ |
| D | clk-i2s-mux.c | 47 .set_parent = clk_i2s_mux_set_parent,
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| /Linux-v5.4/drivers/clk/uniphier/ |
| D | clk-uniphier-mux.c | 52 .set_parent = uniphier_clk_mux_set_parent,
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| D | clk-uniphier-cpugear.c | 72 .set_parent = uniphier_clk_cpugear_set_parent,
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| /Linux-v5.4/drivers/clk/zynqmp/ |
| D | clk-mux-zynqmp.c | 87 .set_parent = zynqmp_clk_mux_set_parent,
|
