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Searched refs:se_num (Results 1 – 17 of 17) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Dnv.c184 static uint32_t nv_read_indexed_register(struct amdgpu_device *adev, u32 se_num, in nv_read_indexed_register() argument
190 if (se_num != 0xffffffff || sh_num != 0xffffffff) in nv_read_indexed_register()
191 amdgpu_gfx_select_se_sh(adev, se_num, sh_num, 0xffffffff); in nv_read_indexed_register()
195 if (se_num != 0xffffffff || sh_num != 0xffffffff) in nv_read_indexed_register()
202 bool indexed, u32 se_num, in nv_get_register_value() argument
206 return nv_read_indexed_register(adev, se_num, sh_num, reg_offset); in nv_get_register_value()
214 static int nv_read_register(struct amdgpu_device *adev, u32 se_num, in nv_read_register() argument
229 se_num, sh_num, reg_offset); in nv_read_register()
Dgfx_v9_0.h29 void gfx_v9_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num);
Dcik.c1028 bool indexed, u32 se_num, in cik_get_register_value() argument
1033 unsigned se_idx = (se_num == 0xffffffff) ? 0 : se_num; in cik_get_register_value()
1048 if (se_num != 0xffffffff || sh_num != 0xffffffff) in cik_get_register_value()
1049 amdgpu_gfx_select_se_sh(adev, se_num, sh_num, 0xffffffff); in cik_get_register_value()
1053 if (se_num != 0xffffffff || sh_num != 0xffffffff) in cik_get_register_value()
1123 static int cik_read_register(struct amdgpu_device *adev, u32 se_num, in cik_read_register() argument
1135 *value = cik_get_register_value(adev, indexed, se_num, sh_num, in cik_read_register()
Dsoc15.c345 static uint32_t soc15_read_indexed_register(struct amdgpu_device *adev, u32 se_num, in soc15_read_indexed_register() argument
351 if (se_num != 0xffffffff || sh_num != 0xffffffff) in soc15_read_indexed_register()
352 amdgpu_gfx_select_se_sh(adev, se_num, sh_num, 0xffffffff); in soc15_read_indexed_register()
356 if (se_num != 0xffffffff || sh_num != 0xffffffff) in soc15_read_indexed_register()
363 bool indexed, u32 se_num, in soc15_get_register_value() argument
367 return soc15_read_indexed_register(adev, se_num, sh_num, reg_offset); in soc15_get_register_value()
377 static int soc15_read_register(struct amdgpu_device *adev, u32 se_num, in soc15_read_register() argument
392 se_num, sh_num, reg_offset); in soc15_read_register()
Dsi.c1018 bool indexed, u32 se_num, in si_get_register_value() argument
1023 unsigned se_idx = (se_num == 0xffffffff) ? 0 : se_num; in si_get_register_value()
1036 if (se_num != 0xffffffff || sh_num != 0xffffffff) in si_get_register_value()
1037 amdgpu_gfx_select_se_sh(adev, se_num, sh_num, 0xffffffff); in si_get_register_value()
1041 if (se_num != 0xffffffff || sh_num != 0xffffffff) in si_get_register_value()
1092 static int si_read_register(struct amdgpu_device *adev, u32 se_num, in si_read_register() argument
1104 *value = si_get_register_value(adev, indexed, se_num, sh_num, in si_read_register()
Dvi.c552 bool indexed, u32 se_num, in vi_get_register_value() argument
557 unsigned se_idx = (se_num == 0xffffffff) ? 0 : se_num; in vi_get_register_value()
572 if (se_num != 0xffffffff || sh_num != 0xffffffff) in vi_get_register_value()
573 amdgpu_gfx_select_se_sh(adev, se_num, sh_num, 0xffffffff); in vi_get_register_value()
577 if (se_num != 0xffffffff || sh_num != 0xffffffff) in vi_get_register_value()
647 static int vi_read_register(struct amdgpu_device *adev, u32 se_num, in vi_read_register() argument
659 *value = vi_get_register_value(adev, indexed, se_num, sh_num, in vi_read_register()
Dsoc15.h51 uint32_t se_num; member
Damdgpu_kms.c630 unsigned se_num = (info->read_mmr_reg.instance >> in amdgpu_info_ioctl() local
639 if (se_num == AMDGPU_INFO_MMR_SE_INDEX_MASK) in amdgpu_info_ioctl()
640 se_num = 0xffffffff; in amdgpu_info_ioctl()
654 if (amdgpu_asic_read_register(adev, se_num, sh_num, in amdgpu_info_ioctl()
Damdgpu_gfx.h188 void (*select_se_sh)(struct amdgpu_device *adev, u32 se_num,
Dgfx_v6_0.c1301 static void gfx_v6_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, in gfx_v6_0_select_se_sh() argument
1311 if ((se_num == 0xffffffff) && (sh_num == 0xffffffff)) in gfx_v6_0_select_se_sh()
1314 else if (se_num == 0xffffffff) in gfx_v6_0_select_se_sh()
1319 (se_num << GRBM_GFX_INDEX__SE_INDEX__SHIFT); in gfx_v6_0_select_se_sh()
1322 (se_num << GRBM_GFX_INDEX__SE_INDEX__SHIFT); in gfx_v6_0_select_se_sh()
Dgfx_v7_0.c1589 u32 se_num, u32 sh_num, u32 instance) in gfx_v7_0_select_se_sh() argument
1598 if ((se_num == 0xffffffff) && (sh_num == 0xffffffff)) in gfx_v7_0_select_se_sh()
1601 else if (se_num == 0xffffffff) in gfx_v7_0_select_se_sh()
1606 (se_num << GRBM_GFX_INDEX__SE_INDEX__SHIFT); in gfx_v7_0_select_se_sh()
1609 (se_num << GRBM_GFX_INDEX__SE_INDEX__SHIFT); in gfx_v7_0_select_se_sh()
Damdgpu.h552 int (*read_register)(struct amdgpu_device *adev, u32 se_num,
Dgfx_v9_0.c732 static void gfx_v9_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 instance);
2383 static void gfx_v9_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 instance) in gfx_v9_0_select_se_sh() argument
2392 if (se_num == 0xffffffff) in gfx_v9_0_select_se_sh()
2395 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_INDEX, se_num); in gfx_v9_0_select_se_sh()
4380 for (j = 0; j < sec_ded_counter_registers[i].se_num; j++) { in gfx_v9_0_do_edc_gpr_workarounds()
Dgfx_v10_0.c245 static void gfx_v10_0_select_se_sh(struct amdgpu_device *adev, u32 se_num,
1495 static void gfx_v10_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, in gfx_v10_0_select_se_sh() argument
1507 if (se_num == 0xffffffff) in gfx_v10_0_select_se_sh()
1511 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_INDEX, se_num); in gfx_v10_0_select_se_sh()
Dgfx_v8_0.c3449 u32 se_num, u32 sh_num, u32 instance) in gfx_v8_0_select_se_sh() argument
3458 if (se_num == 0xffffffff) in gfx_v8_0_select_se_sh()
3461 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_INDEX, se_num); in gfx_v8_0_select_se_sh()
/Linux-v5.4/drivers/gpu/drm/radeon/
Dsi.c2952 u32 se_num, u32 sh_num) in si_select_se_sh() argument
2956 if ((se_num == 0xffffffff) && (sh_num == 0xffffffff)) in si_select_se_sh()
2958 else if (se_num == 0xffffffff) in si_select_se_sh()
2961 data |= SH_BROADCAST_WRITES | SE_INDEX(se_num); in si_select_se_sh()
2963 data |= SH_INDEX(sh_num) | SE_INDEX(se_num); in si_select_se_sh()
2997 u32 se_num, u32 sh_per_se, in si_setup_spi() argument
3003 for (i = 0; i < se_num; i++) { in si_setup_spi()
3044 u32 se_num, u32 sh_per_se, in si_setup_rb() argument
3052 for (i = 0; i < se_num; i++) { in si_setup_rb()
3062 for (i = 0; i < max_rb_num_per_se * se_num; i++) { in si_setup_rb()
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Dcik.c3040 u32 se_num, u32 sh_num) in cik_select_se_sh() argument
3044 if ((se_num == 0xffffffff) && (sh_num == 0xffffffff)) in cik_select_se_sh()
3046 else if (se_num == 0xffffffff) in cik_select_se_sh()
3049 data |= SH_BROADCAST_WRITES | SE_INDEX(se_num); in cik_select_se_sh()
3051 data |= SH_INDEX(sh_num) | SE_INDEX(se_num); in cik_select_se_sh()
3116 u32 se_num, u32 sh_per_se, in cik_setup_rb() argument
3124 for (i = 0; i < se_num; i++) { in cik_setup_rb()
3137 for (i = 0; i < max_rb_num_per_se * se_num; i++) { in cik_setup_rb()
3145 for (i = 0; i < se_num; i++) { in cik_setup_rb()