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Searched refs:sdhci_writel (Results 1 – 18 of 18) sorted by relevance

/Linux-v5.4/drivers/mmc/host/
Dsdhci-pci-dwc-mshc.c41 sdhci_writel(host, reg, (SDHC_AT_CTRL_R + vendor_ptr)); in sdhci_snps_set_clock()
49 sdhci_writel(host, reg, (SDHC_GPIO_OUT + vendor_ptr)); in sdhci_snps_set_clock()
53 sdhci_writel(host, DIV_REG_100_MHZ, SDHC_MMCM_DIV_REG); in sdhci_snps_set_clock()
54 sdhci_writel(host, CLKFBOUT_100_MHZ, in sdhci_snps_set_clock()
57 sdhci_writel(host, DIV_REG_200_MHZ, SDHC_MMCM_DIV_REG); in sdhci_snps_set_clock()
58 sdhci_writel(host, CLKFBOUT_200_MHZ, in sdhci_snps_set_clock()
65 sdhci_writel(host, reg, (SDHC_GPIO_OUT + vendor_ptr)); in sdhci_snps_set_clock()
Dsdhci-pci-gli.c80 sdhci_writel(host, wt_value, SDHCI_GLI_9750_WT); in gl9750_wt_on()
97 sdhci_writel(host, wt_value, SDHCI_GLI_9750_WT); in gl9750_wt_off()
125 sdhci_writel(host, driving_value, SDHCI_GLI_9750_DRIVING); in gli_set_9750()
130 sdhci_writel(host, sw_ctrl_value, SDHCI_GLI_9750_SW_CTRL); in gli_set_9750()
161 sdhci_writel(host, pll_value, SDHCI_GLI_9750_PLL); in gli_set_9750()
162 sdhci_writel(host, misc_value, SDHCI_GLI_9750_MISC); in gli_set_9750()
173 sdhci_writel(host, control_value, SDHCI_GLI_9750_TUNING_CONTROL); in gli_set_9750()
176 sdhci_writel(host, parameter_value, SDHCI_GLI_9750_TUNING_PARAMETERS); in gli_set_9750()
182 sdhci_writel(host, control_value, SDHCI_GLI_9750_TUNING_CONTROL); in gli_set_9750()
207 sdhci_writel(host, misc_value, SDHCI_GLI_9750_MISC); in gli_set_9750_rx_inv()
Dsdhci-of-esdhc.c485 sdhci_writel(host, dmanow, SDHCI_DMA_ADDRESS); in esdhc_of_adma_workaround()
504 sdhci_writel(host, value, ESDHC_DMA_SYSCTL); in esdhc_of_enable_dma()
544 sdhci_writel(host, val, ESDHC_SYSTEM_CONTROL); in esdhc_clock_enable()
597 sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL); in esdhc_of_set_clock()
636 sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL); in esdhc_of_set_clock()
641 sdhci_writel(host, temp | ESDHC_HS400_MODE, ESDHC_TBCTL); in esdhc_of_set_clock()
643 sdhci_writel(host, temp | ESDHC_CMD_CLK_CTL, ESDHC_SDCLKCTL); in esdhc_of_set_clock()
650 sdhci_writel(host, temp, ESDHC_DLLCFG0); in esdhc_of_set_clock()
652 sdhci_writel(host, temp | ESDHC_HS400_WNDW_ADJUST, ESDHC_TBCTL); in esdhc_of_set_clock()
657 sdhci_writel(host, temp, ESDHC_DMA_SYSCTL); in esdhc_of_set_clock()
[all …]
Dsdhci_f_sdh30.c61 sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2); in sdhci_f_sdh30_soft_voltage_switch()
63 sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2); in sdhci_f_sdh30_soft_voltage_switch()
66 sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2); in sdhci_f_sdh30_soft_voltage_switch()
73 sdhci_writel(host, ctrl, F_SDH30_ESD_CONTROL); in sdhci_f_sdh30_soft_voltage_switch()
78 sdhci_writel(host, ctrl, F_SDH30_TUNING_SETTING); in sdhci_f_sdh30_soft_voltage_switch()
99 sdhci_writel(host, ctl, F_SDH30_ESD_CONTROL); in sdhci_f_sdh30_reset()
189 sdhci_writel(host, reg & ~F_SDH30_EMMC_RST, F_SDH30_ESD_CONTROL); in sdhci_f_sdh30_probe()
191 sdhci_writel(host, reg | F_SDH30_EMMC_RST, F_SDH30_ESD_CONTROL); in sdhci_f_sdh30_probe()
Dsdhci-xenon-phy.c237 sdhci_writel(host, reg, phy_regs->timing_adj); in xenon_emmc_phy_init()
353 sdhci_writel(host, reg, phy_regs->dll_ctrl); in xenon_emmc_phy_enable_dll()
408 sdhci_writel(host, reg, XENON_SLOT_OP_STATUS_CTRL); in xenon_emmc_phy_config_tuning()
422 sdhci_writel(host, reg, XENON_SLOT_EMMC_CTRL); in xenon_emmc_phy_disable_strobe()
428 sdhci_writel(host, reg, XENON_EMMC_5_0_PHY_PAD_CONTROL); in xenon_emmc_phy_disable_strobe()
432 sdhci_writel(host, reg, XENON_EMMC_PHY_PAD_CONTROL1); in xenon_emmc_phy_disable_strobe()
465 sdhci_writel(host, reg, XENON_SLOT_EMMC_CTRL); in xenon_emmc_phy_strobe_delay_adj()
472 sdhci_writel(host, reg, XENON_EMMC_5_0_PHY_PAD_CONTROL); in xenon_emmc_phy_strobe_delay_adj()
477 sdhci_writel(host, reg, XENON_EMMC_PHY_PAD_CONTROL1); in xenon_emmc_phy_strobe_delay_adj()
536 sdhci_writel(host, reg, phy_regs->timing_adj); in xenon_emmc_phy_slow_mode()
[all …]
Dsdhci-bcm-kona.c69 sdhci_writel(host, val, KONA_SDHOST_CORECTRL); in sdhci_bcm_kona_sd_reset()
89 sdhci_writel(host, val, KONA_SDHOST_CORECTRL); in sdhci_bcm_kona_sd_reset()
101 sdhci_writel(host, val, KONA_SDHOST_COREIMR); in sdhci_bcm_kona_sd_init()
114 sdhci_writel(host, val, KONA_SDHOST_CORECTRL); in sdhci_bcm_kona_sd_init()
149 sdhci_writel(host, val, KONA_SDHOST_CORESTAT); in sdhci_bcm_kona_sd_card_emulate()
152 sdhci_writel(host, val, KONA_SDHOST_CORESTAT); in sdhci_bcm_kona_sd_card_emulate()
Dsdhci-xenon.c31 sdhci_writel(host, reg, SDHCI_CLOCK_CONTROL); in xenon_enable_internal_clk()
65 sdhci_writel(host, reg, XENON_SYS_OP_CTRL); in xenon_set_sdclk_off_idle()
78 sdhci_writel(host, reg, XENON_SYS_OP_CTRL); in xenon_set_acg()
89 sdhci_writel(host, reg, XENON_SYS_OP_CTRL); in xenon_enable_sdhc()
107 sdhci_writel(host, reg, XENON_SYS_OP_CTRL); in xenon_disable_sdhc()
118 sdhci_writel(host, reg, XENON_SYS_EXT_OP_CTRL); in xenon_enable_sdhc_parallel_tran()
128 sdhci_writel(host, reg, XENON_SYS_EXT_OP_CTRL); in xenon_mask_cmd_conflict_err()
140 sdhci_writel(host, reg, XENON_SLOT_RETUNING_REQ_CTRL); in xenon_retune_setup()
145 sdhci_writel(host, reg, SDHCI_SIGNAL_ENABLE); in xenon_retune_setup()
148 sdhci_writel(host, reg, SDHCI_INT_ENABLE); in xenon_retune_setup()
[all …]
Dsdhci-sprd.c110 sdhci_writel(host, val, SDHCI_SPRD_REG_DEBOUNCE); in sdhci_sprd_init_config()
187 sdhci_writel(host, dll_dly_offset, SDHCI_SPRD_REG_32_DLL_DLY_OFFSET); in sdhci_sprd_set_dll_invert()
232 sdhci_writel(host, val, SDHCI_SPRD_REG_32_BUSY_POSI); in _sdhci_sprd_set_clock()
242 sdhci_writel(host, tmp, SDHCI_SPRD_REG_32_DLL_CFG); in sdhci_sprd_enable_phy_dll()
249 sdhci_writel(host, tmp, SDHCI_SPRD_REG_32_DLL_CFG); in sdhci_sprd_enable_phy_dll()
255 sdhci_writel(host, tmp, SDHCI_SPRD_REG_32_DLL_CFG); in sdhci_sprd_enable_phy_dll()
347 sdhci_writel(host, p[timing], SDHCI_SPRD_REG_32_DLL_DLY); in sdhci_sprd_set_uhs_signaling()
488 sdhci_writel(host, p[MMC_TIMING_MMC_HS400 + 1], in sdhci_sprd_hs400_enhanced_strobe()
Dsdhci.c168 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_set_card_detection()
169 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_set_card_detection()
265 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_set_default_irqs()
266 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_set_default_irqs()
550 sdhci_writel(host, scratch, SDHCI_BUFFER); in sdhci_write_block_pio()
821 sdhci_writel(host, lower_32_bits(addr), SDHCI_ADMA_ADDRESS); in sdhci_set_adma_addr()
823 sdhci_writel(host, upper_32_bits(addr), SDHCI_ADMA_ADDRESS_HI); in sdhci_set_adma_addr()
839 sdhci_writel(host, addr, SDHCI_DMA_ADDRESS); in sdhci_set_sdma_addr()
980 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_set_transfer_irqs()
981 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_set_transfer_irqs()
[all …]
Dsdhci-tegra.c326 sdhci_writel(host, reg, SDHCI_TEGRA_VENDOR_CLOCK_CTRL); in tegra_sdhci_set_tap()
349 sdhci_writel(host, val, SDHCI_TEGRA_VENDOR_SYS_SW_CTRL); in tegra_sdhci_hs400_enhanced_strobe()
395 sdhci_writel(host, misc_ctrl, SDHCI_TEGRA_VENDOR_MISC_CTRL); in tegra_sdhci_reset()
396 sdhci_writel(host, clk_ctrl, SDHCI_TEGRA_VENDOR_CLOCK_CTRL); in tegra_sdhci_reset()
402 sdhci_writel(host, pad_ctrl, SDHCI_TEGRA_SDMEM_COMP_PADCTRL); in tegra_sdhci_reset()
425 sdhci_writel(host, val, SDHCI_TEGRA_SDMEM_COMP_PADCTRL); in tegra_sdhci_configure_cal_pad()
439 sdhci_writel(host, reg, SDHCI_TEGRA_AUTO_CAL_CONFIG); in tegra_sdhci_set_pad_autocal_offset()
485 sdhci_writel(host, reg, in tegra_sdhci_set_padctrl()
547 sdhci_writel(host, reg, SDHCI_TEGRA_AUTO_CAL_CONFIG); in tegra_sdhci_pad_autocalib()
565 sdhci_writel(host, reg, SDHCI_TEGRA_AUTO_CAL_CONFIG); in tegra_sdhci_pad_autocalib()
[all …]
Dsdhci-pci-o2micro.c105 sdhci_writel(host, scratch32, O2_PLL_DLL_WDT_CONTROL1); in sdhci_o2_enable_internal_clock()
108 sdhci_writel(host, scratch32, O2_PLL_DLL_WDT_CONTROL1); in sdhci_o2_enable_internal_clock()
112 sdhci_writel(host, scratch32, O2_PLL_DLL_WDT_CONTROL1); in sdhci_o2_enable_internal_clock()
139 sdhci_writel(host, scratch32, O2_PLL_DLL_WDT_CONTROL1); in sdhci_o2_enable_internal_clock()
250 sdhci_writel(host, scratch_32, O2_PLL_DLL_WDT_CONTROL1); in sdhci_o2_dll_recovery()
571 sdhci_writel(host, reg, O2_SD_VENDOR_SETTING2); in sdhci_pci_o2_probe_slot()
Dsdhci-sirf.c91 sdhci_writel(host, in sdhci_sirf_execute_tuning()
125 sdhci_writel(host, in sdhci_sirf_execute_tuning()
Dsdhci-omap.c456 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_omap_execute_tuning()
457 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_omap_execute_tuning()
483 sdhci_writel(host, ier, SDHCI_INT_ENABLE); in sdhci_omap_card_busy()
484 sdhci_writel(host, ier, SDHCI_SIGNAL_ENABLE); in sdhci_omap_card_busy()
499 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_omap_card_busy()
500 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_omap_card_busy()
819 sdhci_writel(host, intmask & CMD_MASK, SDHCI_INT_STATUS); in sdhci_omap_irq()
Dsdhci-acpi.c470 sdhci_writel(host, 0x3, VENDOR_SPECIFIC_PWRCTL_CLEAR_REG); in sdhci_acpi_qcom_handler()
471 sdhci_writel(host, 0x1, VENDOR_SPECIFIC_PWRCTL_CTL_REG); in sdhci_acpi_qcom_handler()
548 sdhci_writel(host, 0x40003210, SDHCI_AMD_RESET_DLL_REGISTER); in sdhci_acpi_amd_hs400_dll()
550 sdhci_writel(host, 0x40033210, SDHCI_AMD_RESET_DLL_REGISTER); in sdhci_acpi_amd_hs400_dll()
Dsdhci.h651 static inline void sdhci_writel(struct sdhci_host *host, u32 val, int reg) in sdhci_writel() function
701 static inline void sdhci_writel(struct sdhci_host *host, u32 val, int reg) in sdhci_writel() function
Dsdhci-esdhc-imx.c776 sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL); in esdhc_pltfm_set_clock()
804 sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL); in esdhc_pltfm_set_clock()
1099 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in esdhc_reset()
1100 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in esdhc_reset()
Dsdhci-of-arasan.c248 sdhci_writel(host, vendor, SDHCI_ARASAN_VENDOR_REGISTER); in sdhci_arasan_hs400_enhanced_strobe()
Dsdhci-pci-core.c669 sdhci_writel(host, val, INTEL_HS400_ES_REG); in intel_hs400_enhanced_strobe()
889 sdhci_writel(host, glk_rx_ctrl1, GLK_RX_CTRL1); in glk_rpm_retune_wa()