Searched refs:sclk_high (Results 1 – 2 of 2) sorted by relevance
411 if (current_state->sclk_low == current_state->sclk_high) in rs780_force_fbdiv()436 if ((new_state->sclk_high == old_state->sclk_high) && in rs780_set_engine_clock_scaling()446 new_state->sclk_high, false, &max_dividers); in rs780_set_engine_clock_scaling()451 old_state->sclk_high, false, ¤t_max_dividers); in rs780_set_engine_clock_scaling()483 if ((new_state->sclk_high == old_state->sclk_high) && in rs780_set_engine_clock_spc()501 if ((new_state->sclk_high == old_state->sclk_high) && in rs780_activate_engine_clk_scaling()505 if (new_state->sclk_high == new_state->sclk_low) in rs780_activate_engine_clk_scaling()576 if (new_state->sclk_high >= current_state->sclk_high) in rs780_set_uvd_clock_before_set_eng_clock()593 if (new_state->sclk_high < current_state->sclk_high) in rs780_set_uvd_clock_after_set_eng_clock()761 ps->sclk_high = sclk; in rs780_parse_pplib_clock_info()[all …]
56 u32 sclk_high; member
