Searched refs:rfsw_ctrl (Results 1 – 6 of 6) sorted by relevance
208 rtlphy->phyreg_def[RF90_PATH_A].rfsw_ctrl = RFPGA0_XAB_SWITCHCONTROL; in rtl8723_phy_init_bb_rf_reg_def()209 rtlphy->phyreg_def[RF90_PATH_B].rfsw_ctrl = RFPGA0_XAB_SWITCHCONTROL; in rtl8723_phy_init_bb_rf_reg_def()210 rtlphy->phyreg_def[RF90_PATH_C].rfsw_ctrl = RFPGA0_XCD_SWITCHCONTROL; in rtl8723_phy_init_bb_rf_reg_def()211 rtlphy->phyreg_def[RF90_PATH_D].rfsw_ctrl = RFPGA0_XCD_SWITCHCONTROL; in rtl8723_phy_init_bb_rf_reg_def()
743 rtlphy->phyreg_def[RF90_PATH_A].rfsw_ctrl = RFPGA0_XAB_SWITCHCONTROL; in _rtl92s_phy_init_register_definition()744 rtlphy->phyreg_def[RF90_PATH_B].rfsw_ctrl = RFPGA0_XAB_SWITCHCONTROL; in _rtl92s_phy_init_register_definition()745 rtlphy->phyreg_def[RF90_PATH_C].rfsw_ctrl = RFPGA0_XCD_SWITCHCONTROL; in _rtl92s_phy_init_register_definition()746 rtlphy->phyreg_def[RF90_PATH_D].rfsw_ctrl = RFPGA0_XCD_SWITCHCONTROL; in _rtl92s_phy_init_register_definition()
449 rtlphy->phyreg_def[RF90_PATH_A].rfsw_ctrl = RFPGA0_XAB_SWITCHCONTROL; in _rtl92c_phy_init_bb_rf_register_definition()450 rtlphy->phyreg_def[RF90_PATH_B].rfsw_ctrl = RFPGA0_XAB_SWITCHCONTROL; in _rtl92c_phy_init_bb_rf_register_definition()451 rtlphy->phyreg_def[RF90_PATH_C].rfsw_ctrl = RFPGA0_XCD_SWITCHCONTROL; in _rtl92c_phy_init_bb_rf_register_definition()452 rtlphy->phyreg_def[RF90_PATH_D].rfsw_ctrl = RFPGA0_XCD_SWITCHCONTROL; in _rtl92c_phy_init_bb_rf_register_definition()
867 rtlphy->phyreg_def[RF90_PATH_A].rfsw_ctrl = in _rtl88e_phy_init_bb_rf_register_definition()869 rtlphy->phyreg_def[RF90_PATH_B].rfsw_ctrl = in _rtl88e_phy_init_bb_rf_register_definition()871 rtlphy->phyreg_def[RF90_PATH_C].rfsw_ctrl = in _rtl88e_phy_init_bb_rf_register_definition()873 rtlphy->phyreg_def[RF90_PATH_D].rfsw_ctrl = in _rtl88e_phy_init_bb_rf_register_definition()
457 rtlphy->phyreg_def[RF90_PATH_A].rfsw_ctrl = RFPGA0_XAB_SWITCHCONTROL; in _rtl92d_phy_init_bb_rf_register_definition()458 rtlphy->phyreg_def[RF90_PATH_B].rfsw_ctrl = RFPGA0_XAB_SWITCHCONTROL; in _rtl92d_phy_init_bb_rf_register_definition()459 rtlphy->phyreg_def[RF90_PATH_C].rfsw_ctrl = RFPGA0_XCD_SWITCHCONTROL; in _rtl92d_phy_init_bb_rf_register_definition()460 rtlphy->phyreg_def[RF90_PATH_D].rfsw_ctrl = RFPGA0_XCD_SWITCHCONTROL; in _rtl92d_phy_init_bb_rf_register_definition()
394 u32 rfsw_ctrl; member
