Searched refs:reference_div (Results 1 – 12 of 12) sorted by relevance
121 p1pll->reference_div = RREG32_PLL(RADEON_PPLL_REF_DIV) & 0x3ff; in radeon_read_clocks_OF()122 if (p1pll->reference_div < 2) in radeon_read_clocks_OF()123 p1pll->reference_div = 12; in radeon_read_clocks_OF()124 p2pll->reference_div = p1pll->reference_div; in radeon_read_clocks_OF()150 spll->reference_div = mpll->reference_div = in radeon_read_clocks_OF()197 if (p1pll->reference_div < 2) { in radeon_get_clock_info()201 p1pll->reference_div = in radeon_get_clock_info()204 p1pll->reference_div = tmp & RADEON_PPLL_REF_DIV_MASK; in radeon_get_clock_info()205 if (p1pll->reference_div < 2) in radeon_get_clock_info()206 p1pll->reference_div = 12; in radeon_get_clock_info()[all …]
741 uint32_t reference_div = 0; in radeon_set_pll() local820 &reference_div, &post_divider); in radeon_set_pll()833 reference_div, in radeon_set_pll()836 pll_ref_div = reference_div; in radeon_set_pll()
981 ref_div_min = pll->reference_div; in radeon_compute_pll_avivo()987 ref_div_max = pll->reference_div; in radeon_compute_pll_avivo()1146 min_ref_div = max_ref_div = pll->reference_div; in radeon_compute_pll_legacy()
170 uint32_t reference_div; member
749 p1pll->reference_div = RBIOS16(pll_info + 0x10); in radeon_combios_get_clock_info()766 spll->reference_div = RBIOS16(pll_info + 0x1c); in radeon_combios_get_clock_info()781 mpll->reference_div = RBIOS16(pll_info + 0x28); in radeon_combios_get_clock_info()
1160 p1pll->reference_div = 0; in radeon_atom_get_clock_info()1206 spll->reference_div = 0; in radeon_atom_get_clock_info()1233 mpll->reference_div = 0; in radeon_atom_get_clock_info()
1098 pll->reference_div = radeon_crtc->pll_reference_div; in atombios_crtc_set_pll()
142 ref_div_min = pll->reference_div; in amdgpu_pll_compute()148 ref_div_max = pll->reference_div; in amdgpu_pll_compute()
386 spll->reference_div = 0; in amdgpu_atomfirmware_get_clock_info()409 mpll->reference_div = 0; in amdgpu_atomfirmware_get_clock_info()
195 uint32_t reference_div; member
594 ppll->reference_div = 0; in amdgpu_atombios_get_clock_info()634 spll->reference_div = 0; in amdgpu_atombios_get_clock_info()661 mpll->reference_div = 0; in amdgpu_atombios_get_clock_info()
851 pll->reference_div = amdgpu_crtc->pll_reference_div; in amdgpu_atombios_crtc_set_pll()
