Home
last modified time | relevance | path

Searched refs:refdiv (Results 1 – 20 of 20) sorted by relevance

/Linux-v5.4/drivers/clk/rockchip/
Dclk-pll.c140 rate->refdiv = ((pllcon >> RK3036_PLLCON1_REFDIV_SHIFT) in rockchip_rk3036_pll_get_params()
162 do_div(rate64, cur.refdiv); in rockchip_rk3036_pll_recalc_rate()
168 do_div(frac_rate64, cur.refdiv); in rockchip_rk3036_pll_recalc_rate()
190 __func__, rate->rate, rate->fbdiv, rate->postdiv1, rate->refdiv, in rockchip_rk3036_pll_set_params()
209 writel_relaxed(HIWORD_UPDATE(rate->refdiv, RK3036_PLLCON1_REFDIV_MASK, in rockchip_rk3036_pll_set_params()
307 cur.fbdiv, cur.postdiv1, cur.refdiv, cur.postdiv2, in rockchip_rk3036_pll_init()
310 rate->fbdiv, rate->postdiv1, rate->refdiv, rate->postdiv2, in rockchip_rk3036_pll_init()
314 rate->refdiv != cur.refdiv || rate->postdiv2 != cur.postdiv2 || in rockchip_rk3036_pll_init()
613 rate->refdiv = ((pllcon >> RK3399_PLLCON1_REFDIV_SHIFT) in rockchip_rk3399_pll_get_params()
639 do_div(rate64, cur.refdiv); in rockchip_rk3399_pll_recalc_rate()
[all …]
Dclk.h204 .refdiv = _refdiv, \
253 unsigned int refdiv; member
/Linux-v5.4/arch/mips/ath25/
Dar2315.c209 unsigned int pllc_out, refdiv, fdiv, divby2; in ar2315_sys_clk() local
213 refdiv = ATH25_REG_MS(pllc_ctrl, AR2315_PLLC_REF_DIV); in ar2315_sys_clk()
214 refdiv = clockctl1_predivide_table[refdiv]; in ar2315_sys_clk()
217 pllc_out = (40000000 / refdiv) * (2 * divby2) * fdiv; in ar2315_sys_clk()
/Linux-v5.4/drivers/clk/pistachio/
Dclk-pll.c206 if (!params || !params->refdiv) in pll_gf40lp_frac_set_rate()
212 vco = div64_u64(vco, params->refdiv << 24); in pll_gf40lp_frac_set_rate()
218 val = div64_u64(params->fref, params->refdiv); in pll_gf40lp_frac_set_rate()
229 val |= (params->refdiv << PLL_CTRL1_REFDIV_SHIFT) | in pll_gf40lp_frac_set_rate()
363 if (!params || !params->refdiv) in pll_gf40lp_laint_set_rate()
366 vco = div_u64(params->fref * params->fbdiv, params->refdiv); in pll_gf40lp_laint_set_rate()
371 val = div_u64(params->fref, params->refdiv); in pll_gf40lp_laint_set_rate()
397 val |= (params->refdiv << PLL_CTRL1_REFDIV_SHIFT) | in pll_gf40lp_laint_set_rate()
Dclk.h97 unsigned long long refdiv; member
/Linux-v5.4/drivers/clk/socfpga/
Dclk-pll-s10.c35 unsigned long refdiv; in clk_pll_recalc_rate() local
41 refdiv = (reg & SOCFPGA_PLL_REFDIV_MASK) >> SOCFPGA_PLL_REFDIV_SHIFT; in clk_pll_recalc_rate()
42 vco_freq = (unsigned long long)parent_rate / refdiv; in clk_pll_recalc_rate()
/Linux-v5.4/drivers/clk/berlin/
Dberlin2-avpll.c159 u32 reg, refdiv, fbdiv; in berlin2_avpll_vco_recalc_rate() local
164 refdiv = (reg & VCO_REFDIV_MASK) >> VCO_REFDIV_SHIFT; in berlin2_avpll_vco_recalc_rate()
165 refdiv = vco_refdiv[refdiv]; in berlin2_avpll_vco_recalc_rate()
168 do_div(freq, refdiv); in berlin2_avpll_vco_recalc_rate()
/Linux-v5.4/drivers/net/wireless/ath/ath10k/
Dhw.c484 .refdiv = 0,
492 .refdiv = 0,
500 .refdiv = 0,
508 .refdiv = 0,
516 .refdiv = 0,
524 .refdiv = 0,
532 .refdiv = 0,
540 .refdiv = 0,
817 reg_val |= (SM(hw_clk->refdiv, WLAN_PLL_CONTROL_REFDIV) | in ath10k_hw_qca6174_enable_pll_clock()
Dhw.h506 u32 refdiv; member
/Linux-v5.4/drivers/media/dvb-frontends/
Dcx24113.c85 u8 refdiv; member
281 static u8 cx24113_set_ref_div(struct cx24113_state *state, u8 refdiv) in cx24113_set_ref_div() argument
284 refdiv = 2; in cx24113_set_ref_div()
285 return state->refdiv = refdiv; in cx24113_set_ref_div()
396 cx24113_set_nfr(state, n, f, state->refdiv); in cx24113_set_frequency()
/Linux-v5.4/sound/soc/codecs/
Darizona.c2098 int refdiv; member
2155 int refdiv, div; in arizona_calc_fratio() local
2159 cfg->refdiv = 0; in arizona_calc_fratio()
2163 cfg->refdiv++; in arizona_calc_fratio()
2195 refdiv = cfg->refdiv; in arizona_calc_fratio()
2198 init_ratio, Fref, refdiv); in arizona_calc_fratio()
2206 cfg->refdiv = refdiv; in arizona_calc_fratio()
2210 Fref, refdiv, div, ratio); in arizona_calc_fratio()
2232 cfg->refdiv = refdiv; in arizona_calc_fratio()
2236 Fref, refdiv, div, ratio); in arizona_calc_fratio()
[all …]
Dmadera.c3479 int refdiv, div; in madera_calc_fratio() local
3483 cfg->refdiv = 0; in madera_calc_fratio()
3487 cfg->refdiv++; in madera_calc_fratio()
3528 refdiv = cfg->refdiv; in madera_calc_fratio()
3537 cfg->refdiv = refdiv; in madera_calc_fratio()
3553 cfg->refdiv = refdiv; in madera_calc_fratio()
3561 refdiv++; in madera_calc_fratio()
3609 fref = fref / (1 << cfg->refdiv); in madera_calc_fll()
3678 cfg->fratio, ratio, cfg->refdiv, 1 << cfg->refdiv); in madera_calc_fll()
3711 cfg->refdiv << MADERA_FLL1_REFCLK_DIV_SHIFT | in madera_write_fll()
[all …]
Dmadera.h150 int refdiv; member
/Linux-v5.4/drivers/clk/
Dclk-axm5516.c52 unsigned long rate, fbdiv, refdiv, postdiv; in axxia_pllclk_recalc() local
58 refdiv = ((control >> 16) & 0x1f) + 1; in axxia_pllclk_recalc()
59 rate = (parent_rate / (refdiv * postdiv)) * fbdiv; in axxia_pllclk_recalc()
/Linux-v5.4/drivers/net/wireless/ath/ath9k/
Dhw.c834 u32 regval, pll2_divint, pll2_divfrac, refdiv; in ath9k_hw_init_pll() local
847 refdiv = 1; in ath9k_hw_init_pll()
851 refdiv = 3; in ath9k_hw_init_pll()
857 refdiv = 5; in ath9k_hw_init_pll()
863 refdiv = 1; in ath9k_hw_init_pll()
875 REG_WRITE(ah, AR_PHY_PLL_CONTROL, (refdiv << 27) | in ath9k_hw_init_pll()
/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Damdgpu_mode.h374 uint8_t refdiv; member
Datombios_crtc.c340 if (amdgpu_crtc->ss.refdiv) { in amdgpu_atombios_crtc_adjust_pll()
342 amdgpu_crtc->pll_reference_div = amdgpu_crtc->ss.refdiv; in amdgpu_atombios_crtc_adjust_pll()
/Linux-v5.4/drivers/gpu/drm/radeon/
Dradeon_mode.h315 uint8_t refdiv; member
Datombios_crtc.c630 if (radeon_crtc->ss.refdiv) { in atombios_adjust_pll()
632 radeon_crtc->pll_reference_div = radeon_crtc->ss.refdiv; in atombios_adjust_pll()
Dradeon_atombios.c1420 ss->refdiv = ss_assign->ucRecommendedRef_Div; in radeon_atombios_get_ppll_ss_info()