| /Linux-v5.4/arch/mips/ath79/ | 
| D | clock.c | 148 	u32 ref_div;  in ar933x_clocks_init()  local 167 		ref_div = 1;  in ar933x_clocks_init() 182 		ref_div = t;  in ar933x_clocks_init() 205 			 ref_div * out_div * cpu_div);  in ar933x_clocks_init() 207 			 ref_div * out_div * ddr_div);  in ar933x_clocks_init() 209 			 ref_div * out_div * ahb_div);  in ar933x_clocks_init() 212 static u32 __init ar934x_get_pll_freq(u32 ref, u32 ref_div, u32 nint, u32 nfrac,  in ar934x_get_pll_freq()  argument 220 	do_div(t, ref_div);  in ar934x_get_pll_freq() 225 	do_div(t, ref_div * frac);  in ar934x_get_pll_freq() 238 	u32 pll, out_div, ref_div, nint, nfrac, frac, clk_ctrl, postdiv;  in ar934x_clocks_init()  local [all …] 
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| /Linux-v5.4/drivers/gpu/drm/amd/amdgpu/ | 
| D | amdgpu_pll.c | 85 				      unsigned *fb_div, unsigned *ref_div)  in amdgpu_pll_get_fb_ref_div()  argument 91 	*ref_div = min(max(DIV_ROUND_CLOSEST(den, post_div), 1u), ref_div_max);  in amdgpu_pll_get_fb_ref_div() 92 	*fb_div = DIV_ROUND_CLOSEST(nom * *ref_div * post_div, den);  in amdgpu_pll_get_fb_ref_div() 96 		*ref_div = DIV_ROUND_CLOSEST(*ref_div * fb_div_max, *fb_div);  in amdgpu_pll_get_fb_ref_div() 127 	unsigned ref_div_min, ref_div_max, ref_div;  in amdgpu_pll_compute()  local 202 					  ref_div_max, &fb_div, &ref_div);  in amdgpu_pll_compute() 204 			(ref_div * post_div));  in amdgpu_pll_compute() 217 				  &fb_div, &ref_div);  in amdgpu_pll_compute() 221 	amdgpu_pll_reduce_ratio(&fb_div, &ref_div, fb_div_min, ref_div_min);  in amdgpu_pll_compute() 229 			ref_div *= tmp;  in amdgpu_pll_compute() [all …] 
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| D | atombios_crtc.c | 582 				      u32 ref_div,  in amdgpu_atombios_crtc_program_pll()  argument 609 			args.v1.usRefDiv = cpu_to_le16(ref_div);  in amdgpu_atombios_crtc_program_pll() 619 			args.v2.usRefDiv = cpu_to_le16(ref_div);  in amdgpu_atombios_crtc_program_pll() 629 			args.v3.usRefDiv = cpu_to_le16(ref_div);  in amdgpu_atombios_crtc_program_pll() 646 			args.v5.ucRefDiv = ref_div;  in amdgpu_atombios_crtc_program_pll() 676 			args.v6.ucRefDiv = ref_div;  in amdgpu_atombios_crtc_program_pll() 826 	u32 ref_div = 0, fb_div = 0, frac_fb_div = 0, post_div = 0;  in amdgpu_atombios_crtc_set_pll()  local 855 			    &fb_div, &frac_fb_div, &ref_div, &post_div);  in amdgpu_atombios_crtc_set_pll() 862 				  ref_div, fb_div, frac_fb_div, post_div,  in amdgpu_atombios_crtc_set_pll() 875 			step_size = (4 * amount * ref_div * ((u32)amdgpu_crtc->ss.rate * 2048)) /  in amdgpu_atombios_crtc_set_pll() [all …] 
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| D | atombios_crtc.h | 48 			       u32 ref_div,
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| D | amdgpu_atombios.h | 43 	u32 ref_div;  member
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| /Linux-v5.4/drivers/gpu/drm/radeon/ | 
| D | radeon_clocks.c | 42 	uint32_t fb_div, ref_div, post_div, sclk;  in radeon_legacy_get_engine_clock()  local 49 	ref_div =  in radeon_legacy_get_engine_clock() 52 	if (ref_div == 0)  in radeon_legacy_get_engine_clock() 55 	sclk = fb_div / ref_div;  in radeon_legacy_get_engine_clock() 72 	uint32_t fb_div, ref_div, post_div, mclk;  in radeon_legacy_get_memory_clock()  local 79 	ref_div =  in radeon_legacy_get_memory_clock() 82 	if (ref_div == 0)  in radeon_legacy_get_memory_clock() 85 	mclk = fb_div / ref_div;  in radeon_legacy_get_memory_clock() 355 	int ref_div = spll->reference_div;  in calc_eng_mem_clock()  local 357 	if (!ref_div)  in calc_eng_mem_clock() [all …] 
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| D | radeon_display.c | 924 				 unsigned *fb_div, unsigned *ref_div)  in avivo_get_fb_ref_div()  argument 930 	*ref_div = min(max(den/post_div, 1u), ref_div_max);  in avivo_get_fb_ref_div() 931 	*fb_div = DIV_ROUND_CLOSEST(nom * *ref_div * post_div, den);  in avivo_get_fb_ref_div() 935 		*ref_div = (*ref_div * fb_div_max)/(*fb_div);  in avivo_get_fb_ref_div() 966 	unsigned ref_div_min, ref_div_max, ref_div;  in radeon_compute_pll_avivo()  local 1044 				     ref_div_max, &fb_div, &ref_div);  in radeon_compute_pll_avivo() 1046 			(ref_div * post_div));  in radeon_compute_pll_avivo() 1059 			     &fb_div, &ref_div);  in radeon_compute_pll_avivo() 1063 	avivo_reduce_ratio(&fb_div, &ref_div, fb_div_min, ref_div_min);  in radeon_compute_pll_avivo() 1071 			ref_div *= tmp;  in radeon_compute_pll_avivo() [all …] 
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| D | rv740_dpm.c | 141 	reference_divider = 1 + dividers.ref_div;  in rv740_populate_sclk_value() 148 	spll_func_cntl |= SPLL_REF_DIV(dividers.ref_div);  in rv740_populate_sclk_value() 216 	mpll_ad_func_cntl |= CLKR(dividers.ref_div);  in rv740_populate_mclk_value() 233 		mpll_dq_func_cntl |= CLKR(dividers.ref_div);  in rv740_populate_mclk_value() 252 			u32 decoded_ref = rv740_get_decoded_reference_divider(dividers.ref_div);  in rv740_populate_mclk_value()
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| D | rs780_dpm.c | 88 	r600_engine_clock_entry_set_reference_divider(rdev, 0, dividers.ref_div);  in rs780_initialize_dpm_power_state() 455 	if ((min_dividers.ref_div != max_dividers.ref_div) ||  in rs780_set_engine_clock_scaling() 457 	    (max_dividers.ref_div != current_max_dividers.ref_div) ||  in rs780_set_engine_clock_scaling() 990 	u32 ref_div = ((func_cntl & SPLL_REF_DIV_MASK) >> SPLL_REF_DIV_SHIFT) + 1;  in rs780_dpm_debugfs_print_current_performance_level()  local 994 		(post_div * ref_div);  in rs780_dpm_debugfs_print_current_performance_level() 1012 	u32 ref_div = ((func_cntl & SPLL_REF_DIV_MASK) >> SPLL_REF_DIV_SHIFT) + 1;  in rs780_dpm_get_current_sclk()  local 1016 		(post_div * ref_div);  in rs780_dpm_get_current_sclk()
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| D | atombios_crtc.c | 829 				      u32 ref_div,  in atombios_crtc_program_pll()  argument 856 			args.v1.usRefDiv = cpu_to_le16(ref_div);  in atombios_crtc_program_pll() 866 			args.v2.usRefDiv = cpu_to_le16(ref_div);  in atombios_crtc_program_pll() 876 			args.v3.usRefDiv = cpu_to_le16(ref_div);  in atombios_crtc_program_pll() 893 			args.v5.ucRefDiv = ref_div;  in atombios_crtc_program_pll() 922 			args.v6.ucRefDiv = ref_div;  in atombios_crtc_program_pll() 1072 	u32 ref_div = 0, fb_div = 0, frac_fb_div = 0, post_div = 0;  in atombios_crtc_set_pll()  local 1104 					  &fb_div, &frac_fb_div, &ref_div, &post_div);  in atombios_crtc_set_pll() 1107 					 &fb_div, &frac_fb_div, &ref_div, &post_div);  in atombios_crtc_set_pll() 1110 					  &fb_div, &frac_fb_div, &ref_div, &post_div);  in atombios_crtc_set_pll() [all …] 
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| D | rv730_dpm.c | 61 	reference_divider = 1 + dividers.ref_div;  in rv730_populate_sclk_value() 79 	spll_func_cntl |= SPLL_REF_DIV(dividers.ref_div);  in rv730_populate_sclk_value() 139 	reference_divider = dividers.ref_div + 1;  in rv730_populate_mclk_value() 154 	mpll_func_cntl |= MPLL_REF_DIV(dividers.ref_div);  in rv730_populate_mclk_value()
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| D | rv770_dpm.c | 333 	reference_divider = dividers->ref_div;  in rv770_calculate_fractional_mpll_feedback_divider() 414 	if ((dividers.ref_div < 1) || (dividers.ref_div > 5))  in rv770_populate_mclk_value() 432 	mpll_ad_func_cntl |= CLKR(encoded_reference_dividers[dividers.ref_div - 1]);  in rv770_populate_mclk_value() 460 		mpll_dq_func_cntl |= CLKR(encoded_reference_dividers[dividers.ref_div - 1]);  in rv770_populate_mclk_value() 510 	reference_divider = 1 + dividers.ref_div;  in rv770_populate_sclk_value() 526 	spll_func_cntl |= SPLL_REF_DIV(dividers.ref_div);  in rv770_populate_sclk_value() 810 		       (MPLL_LOCK_TIME(R600_MPLLLOCKTIME_DFLT * pi->ref_div) |  in rv770_program_mpll_timing_parameters() 2376 		pi->ref_div = dividers.ref_div + 1;  in rv770_dpm_init() 2378 		pi->ref_div = R600_REFERENCEDIVIDER_DFLT;  in rv770_dpm_init()
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| D | rv6xx_dpm.c | 530 		(dividers->ref_div + 1);  in rv6xx_calculate_vco_frequency() 567 									      (ref_clk / (dividers.ref_div + 1)),  in rv6xx_program_engine_spread_spectrum() 573 									      (ref_clk / (dividers.ref_div + 1)));  in rv6xx_program_engine_spread_spectrum() 606 	rv6xx_memory_clock_entry_set_reference_divider(rdev, entry, dividers.ref_div);  in rv6xx_program_mclk_stepping_entry() 685 									     (ref_clk / (dividers.ref_div + 1)),  in rv6xx_program_mclk_spread_spectrum_parameters() 691 									     (ref_clk / (dividers.ref_div + 1)));  in rv6xx_program_mclk_spread_spectrum_parameters() 1960 		pi->spll_ref_div = dividers.ref_div + 1;  in rv6xx_dpm_init() 1967 		pi->mpll_ref_div = dividers.ref_div + 1;  in rv6xx_dpm_init()
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| D | radeon_legacy_crtc.c | 266 static uint8_t radeon_compute_pll_gain(uint16_t ref_freq, uint16_t ref_div,  in radeon_compute_pll_gain()  argument 271 	if (!ref_div)  in radeon_compute_pll_gain() 274 	vcoFreq = ((unsigned)ref_freq * fb_div) / ref_div;  in radeon_compute_pll_gain()
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| D | cypress_dpm.c | 520 	mpll_ad_func_cntl |= CLKR(dividers.ref_div);  in cypress_populate_mclk_value() 537 		mpll_dq_func_cntl |= CLKR(dividers.ref_div);  in cypress_populate_mclk_value() 561 			u32 decoded_ref = rv740_get_decoded_reference_divider(dividers.ref_div);  in cypress_populate_mclk_value() 2059 		pi->ref_div = dividers.ref_div + 1;  in cypress_dpm_init() 2061 		pi->ref_div = R600_REFERENCEDIVIDER_DFLT;  in cypress_dpm_init()
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| D | rv770_dpm.h | 115 	u32 ref_div;  member
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| D | ni_dpm.c | 2022 	reference_divider = 1 + dividers.ref_div;  in ni_calculate_sclk_params() 2030 	spll_func_cntl |= SPLL_REF_DIV(dividers.ref_div);  in ni_calculate_sclk_params() 2202 	mpll_ad_func_cntl |= CLKR(dividers.ref_div);  in ni_populate_mclk_value() 2219 		mpll_dq_func_cntl |= CLKR(dividers.ref_div);  in ni_populate_mclk_value() 2243 			u32 decoded_ref = rv740_get_decoded_reference_divider(dividers.ref_div);  in ni_populate_mclk_value() 4108 		pi->ref_div = dividers.ref_div + 1;  in ni_dpm_init() 4110 		pi->ref_div = R600_REFERENCEDIVIDER_DFLT;  in ni_dpm_init()
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| D | btc_dpm.c | 2611 		pi->ref_div = dividers.ref_div + 1;  in btc_dpm_init() 2613 		pi->ref_div = R600_REFERENCEDIVIDER_DFLT;  in btc_dpm_init()
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| /Linux-v5.4/arch/mips/netlogic/xlp/ | 
| D | nlm_hal.c | 311 	u32 mdiv, fdiv, pll_out_freq_den, reg_select, ref_div, pic_div;  in nlm_xlp2_get_pic_frequency()  local 328 		ref_div = 3;  in nlm_xlp2_get_pic_frequency() 332 		ref_div = 1;  in nlm_xlp2_get_pic_frequency() 336 		ref_div = 1;  in nlm_xlp2_get_pic_frequency() 340 		ref_div = 3;  in nlm_xlp2_get_pic_frequency() 432 	pll_out_freq_den = (1 << vco_post_div) * pll_post_div * ref_div;  in nlm_xlp2_get_pic_frequency()
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| /Linux-v5.4/drivers/media/dvb-frontends/ | 
| D | tda8261.c | 72 static const u8  ref_div[] = { 0x00, 0x01, 0x02, 0x05, 0x07 };  variable 109 	buf[2] = (0x01 << 7) | ((ref_div[config->step_size] & 0x07) << 1);  in tda8261_set_params()
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| /Linux-v5.4/drivers/net/wireless/ath/ath9k/ | 
| D | ar9002_phy.c | 307 	int ref_div = 5;  in ar9002_hw_compute_pll_control()  local 313 			ref_div = 10;  in ar9002_hw_compute_pll_control() 320 	pll = SM(ref_div, AR_RTC_9160_PLL_REFDIV);  in ar9002_hw_compute_pll_control()
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/dcn20/ | 
| D | dcn20_hubbub.c | 535 	uint32_t ref_div = 0;  in hubbub2_get_dchub_ref_freq()  local 538 	REG_GET_2(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, &ref_div,  in hubbub2_get_dchub_ref_freq() 542 		if (ref_div == 2)  in hubbub2_get_dchub_ref_freq()
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| /Linux-v5.4/drivers/video/fbdev/aty/ | 
| D | radeon_base.c | 582 	unsigned sclk, mclk, tmp, ref_div;  in radeon_probe_pll_params()  local 692 	ref_div = INPLL(PPLL_REF_DIV) & 0x3ff;  in radeon_probe_pll_params() 702 	rinfo->pll.ref_div = ref_div;  in radeon_probe_pll_params() 771 	rinfo->pll.ref_div = INPLL(PPLL_REF_DIV) & PPLL_REF_DIV_MASK;  in radeon_get_pllinfo() 794 		rinfo->pll.ref_div	= BIOS_IN16(pll_info_block + 0x10);  in radeon_get_pllinfo() 829 	       rinfo->pll.ref_div,  in radeon_get_pllinfo() 1624 	       rinfo->pll.ref_div, rinfo->pll.ref_clk,  in radeon_calc_pll_regs() 1634 	       rinfo->pll.ref_div, rinfo->pll.ref_clk,  in radeon_calc_pll_regs() 1637 	fb_div = round_div(rinfo->pll.ref_div*pll_output_freq,  in radeon_calc_pll_regs() 1639 	regs->ppll_ref_div = rinfo->pll.ref_div;  in radeon_calc_pll_regs()
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| D | atyfb.h | 51 	int ref_div;  member
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| D | radeonfb.h | 142 	int ref_div;  member
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