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Searched refs:prate (Results 1 – 25 of 114) sorted by relevance

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/Linux-v5.4/arch/unicore32/kernel/
Dclock.c116 unsigned long prate; member
118 {.mrate = 500000000, .prate = 0x00109801},
119 {.mrate = 525000000, .prate = 0x00104C00},
120 {.mrate = 550000000, .prate = 0x00105000},
121 {.mrate = 575000000, .prate = 0x00105400},
122 {.mrate = 600000000, .prate = 0x00105800},
123 {.mrate = 625000000, .prate = 0x00105C00},
124 {.mrate = 650000000, .prate = 0x00106000},
125 {.mrate = 675000000, .prate = 0x00106400},
126 {.mrate = 700000000, .prate = 0x00106800},
[all …]
/Linux-v5.4/drivers/clk/meson/
Dsclk-div.c42 unsigned long prate, int maxdiv) in sclk_div_getdiv() argument
44 int div = DIV_ROUND_CLOSEST_ULL((u64)prate, rate); in sclk_div_getdiv()
50 unsigned long *prate, in sclk_div_bestdiv() argument
64 return sclk_div_getdiv(hw, rate, *prate, maxdiv); in sclk_div_bestdiv()
78 if (rate * i == *prate) in sclk_div_bestdiv()
94 *prate = best_parent; in sclk_div_bestdiv()
100 unsigned long *prate) in sclk_div_round_rate() argument
106 div = sclk_div_bestdiv(hw, rate, prate, sclk); in sclk_div_round_rate()
108 return DIV_ROUND_UP_ULL((u64)*prate, div); in sclk_div_round_rate()
167 unsigned long prate) in sclk_div_set_rate() argument
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Dclk-cpu-dyndiv.c20 unsigned long prate) in meson_clk_cpu_dyndiv_recalc_rate() argument
25 return divider_recalc_rate(hw, prate, in meson_clk_cpu_dyndiv_recalc_rate()
32 unsigned long *prate) in meson_clk_cpu_dyndiv_round_rate() argument
37 return divider_round_rate(hw, rate, prate, NULL, data->div.width, 0); in meson_clk_cpu_dyndiv_round_rate()
Dclk-regmap.c60 unsigned long prate) in clk_regmap_div_recalc_rate() argument
74 return divider_recalc_rate(hw, prate, val, div->table, div->flags, in clk_regmap_div_recalc_rate()
79 unsigned long *prate) in clk_regmap_div_round_rate() argument
96 return divider_ro_round_rate(hw, rate, prate, div->table, in clk_regmap_div_round_rate()
100 return divider_round_rate(hw, rate, prate, div->table, div->width, in clk_regmap_div_round_rate()
/Linux-v5.4/drivers/clk/spear/
Dclk-frac-synth.c44 static unsigned long frac_calc_rate(struct clk_hw *hw, unsigned long prate, in frac_calc_rate() argument
50 prate /= 10000; in frac_calc_rate()
51 prate <<= 14; in frac_calc_rate()
52 prate /= (2 * rtbl[index].div); in frac_calc_rate()
53 prate *= 10000; in frac_calc_rate()
55 return prate; in frac_calc_rate()
59 unsigned long *prate) in clk_frac_round_rate() argument
64 return clk_round_rate_index(hw, drate, *prate, frac_calc_rate, in clk_frac_round_rate()
96 unsigned long prate) in clk_frac_set_rate() argument
103 clk_round_rate_index(hw, drate, prate, frac_calc_rate, frac->rtbl_cnt, in clk_frac_set_rate()
Dclk-vco-pll.c70 unsigned long prate, int index, unsigned long *pll_rate) in pll_calc_rate() argument
72 unsigned long rate = prate; in pll_calc_rate()
85 unsigned long *prate, int *index) in clk_pll_round_rate_index() argument
92 if (!prate) { in clk_pll_round_rate_index()
99 vco_prev_rate = *prate; in clk_pll_round_rate_index()
100 *prate = pll_calc_rate(pll->vco->rtbl, vco_parent_rate, *index, in clk_pll_round_rate_index()
106 *prate = vco_prev_rate; in clk_pll_round_rate_index()
117 unsigned long *prate) in clk_pll_round_rate() argument
121 return clk_pll_round_rate_index(hw, drate, prate, &unused); in clk_pll_round_rate()
145 unsigned long prate) in clk_pll_set_rate() argument
[all …]
Dclk-gpt-synth.c34 static unsigned long gpt_calc_rate(struct clk_hw *hw, unsigned long prate, in gpt_calc_rate() argument
40 prate /= ((1 << (rtbl[index].nscale + 1)) * (rtbl[index].mscale + 1)); in gpt_calc_rate()
42 return prate; in gpt_calc_rate()
46 unsigned long *prate) in clk_gpt_round_rate() argument
51 return clk_round_rate_index(hw, drate, *prate, gpt_calc_rate, in clk_gpt_round_rate()
81 unsigned long prate) in clk_gpt_set_rate() argument
88 clk_round_rate_index(hw, drate, prate, gpt_calc_rate, gpt->rtbl_cnt, in clk_gpt_set_rate()
Dclk-aux-synth.c44 static unsigned long aux_calc_rate(struct clk_hw *hw, unsigned long prate, in aux_calc_rate() argument
51 return (((prate / 10000) * rtbl[index].xscale) / in aux_calc_rate()
56 unsigned long *prate) in clk_aux_round_rate() argument
61 return clk_round_rate_index(hw, drate, *prate, aux_calc_rate, in clk_aux_round_rate()
100 unsigned long prate) in clk_aux_set_rate() argument
107 clk_round_rate_index(hw, drate, prate, aux_calc_rate, aux->rtbl_cnt, in clk_aux_set_rate()
/Linux-v5.4/drivers/clk/qcom/
Dclk-alpha-pll.c407 alpha_pll_calc_rate(u64 prate, u32 l, u32 a, u32 alpha_width) in alpha_pll_calc_rate() argument
409 return (prate * l) + ((prate * a) >> ALPHA_SHIFT(alpha_width)); in alpha_pll_calc_rate()
413 alpha_pll_round_rate(unsigned long rate, unsigned long prate, u32 *l, u64 *a, in alpha_pll_round_rate() argument
420 remainder = do_div(quotient, prate); in alpha_pll_round_rate()
431 remainder = do_div(quotient, prate); in alpha_pll_round_rate()
437 return alpha_pll_calc_rate(prate, *l, *a, alpha_width); in alpha_pll_round_rate()
457 u64 a = 0, prate = parent_rate; in clk_alpha_pll_recalc_rate() local
478 return alpha_pll_calc_rate(prate, l, a, alpha_width); in clk_alpha_pll_recalc_rate()
536 unsigned long prate, in __clk_alpha_pll_set_rate() argument
544 rate = alpha_pll_round_rate(rate, prate, &l, &a, alpha_width); in __clk_alpha_pll_set_rate()
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Dclk-regmap-divider.c19 unsigned long *prate) in div_round_ro_rate() argument
29 return divider_ro_round_rate(hw, rate, prate, NULL, divider->width, in div_round_ro_rate()
34 unsigned long *prate) in div_round_rate() argument
38 return divider_round_rate(hw, rate, prate, NULL, divider->width, in div_round_rate()
Dclk-regmap-mux-div.c125 unsigned long prate, u32 src) in __mux_div_set_rate_and_parent() argument
187 unsigned long rate, unsigned long prate) in mux_div_set_rate() argument
191 return __mux_div_set_rate_and_parent(hw, rate, prate, md->src); in mux_div_set_rate()
195 unsigned long prate, u8 index) in mux_div_set_rate_and_parent() argument
199 return __mux_div_set_rate_and_parent(hw, rate, prate, in mux_div_set_rate_and_parent()
203 static unsigned long mux_div_recalc_rate(struct clk_hw *hw, unsigned long prate) in mux_div_recalc_rate() argument
/Linux-v5.4/drivers/rtc/
Drtc-ac100.c120 unsigned long prate) in ac100_clkout_recalc_rate() argument
128 if (prate != AC100_RTC_32K_RATE) { in ac100_clkout_recalc_rate()
131 prate = divider_recalc_rate(hw, prate, div, in ac100_clkout_recalc_rate()
138 return divider_recalc_rate(hw, prate, div, NULL, in ac100_clkout_recalc_rate()
144 unsigned long prate) in ac100_clkout_round_rate() argument
149 if (prate == AC100_RTC_32K_RATE) in ac100_clkout_round_rate()
150 return divider_round_rate(hw, rate, &prate, NULL, in ac100_clkout_round_rate()
155 tmp_prate = DIV_ROUND_UP(prate, ac100_clkout_prediv[i].val); in ac100_clkout_round_rate()
178 unsigned long tmp, prate; in ac100_clkout_determine_rate() local
200 prate = clk_hw_get_rate(parent); in ac100_clkout_determine_rate()
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/Linux-v5.4/drivers/clk/samsung/
Dclk-cpu.c106 unsigned long drate, unsigned long *prate) in exynos_cpuclk_round_rate() argument
109 *prate = clk_hw_round_rate(parent, drate); in exynos_cpuclk_round_rate()
110 return *prate; in exynos_cpuclk_round_rate()
159 while ((cfg_data->prate * 1000) != ndata->new_rate) { in exynos_cpuclk_pre_rate_change()
160 if (cfg_data->prate == 0) in exynos_cpuclk_pre_rate_change()
236 while ((cfg_data->prate * 1000) != ndata->new_rate) { in exynos_cpuclk_post_rate_change()
237 if (cfg_data->prate == 0) in exynos_cpuclk_post_rate_change()
287 while ((cfg_data->prate * 1000) != ndata->new_rate) { in exynos5433_cpuclk_pre_rate_change()
288 if (cfg_data->prate == 0) in exynos5433_cpuclk_pre_rate_change()
/Linux-v5.4/drivers/clk/zynqmp/
Ddivider.c101 unsigned long *prate) in zynqmp_clk_divider_round_rate() argument
123 return DIV_ROUND_UP_ULL((u64)*prate, bestdiv); in zynqmp_clk_divider_round_rate()
126 bestdiv = zynqmp_divider_get_val(*prate, rate); in zynqmp_clk_divider_round_rate()
129 bestdiv = rate % *prate ? 1 : bestdiv; in zynqmp_clk_divider_round_rate()
130 *prate = rate * bestdiv; in zynqmp_clk_divider_round_rate()
/Linux-v5.4/drivers/clk/
Dclk-vt8500.c132 unsigned long *prate) in vt8500_dclk_round_rate() argument
140 divisor = *prate / rate; in vt8500_dclk_round_rate()
143 if (rate * divisor < *prate) in vt8500_dclk_round_rate()
154 return *prate / divisor; in vt8500_dclk_round_rate()
598 unsigned long *prate) in vtwm_pll_round_rate() argument
607 ret = vt8500_find_pll_bits(rate, *prate, &mul, &div1); in vtwm_pll_round_rate()
609 round_rate = VT8500_BITS_TO_FREQ(*prate, mul, div1); in vtwm_pll_round_rate()
612 ret = wm8650_find_pll_bits(rate, *prate, &mul, &div1, &div2); in vtwm_pll_round_rate()
614 round_rate = WM8650_BITS_TO_FREQ(*prate, mul, div1, div2); in vtwm_pll_round_rate()
617 ret = wm8750_find_pll_bits(rate, *prate, &filter, &mul, &div1, &div2); in vtwm_pll_round_rate()
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Dclk-divider.c346 unsigned long rate, unsigned long *prate, in divider_round_rate_parent() argument
352 div = clk_divider_bestdiv(hw, parent, rate, prate, table, width, flags); in divider_round_rate_parent()
354 return DIV_ROUND_UP_ULL((u64)*prate, div); in divider_round_rate_parent()
359 unsigned long rate, unsigned long *prate, in divider_ro_round_rate_parent() argument
372 *prate = clk_hw_round_rate(parent, rate * div); in divider_ro_round_rate_parent()
375 return DIV_ROUND_UP_ULL((u64)*prate, div); in divider_ro_round_rate_parent()
381 unsigned long *prate) in clk_divider_round_rate() argument
392 return divider_ro_round_rate(hw, rate, prate, divider->table, in clk_divider_round_rate()
397 return divider_round_rate(hw, rate, prate, divider->table, in clk_divider_round_rate()
/Linux-v5.4/drivers/clk/axs10x/
Di2s_pll_clock.c89 static const struct i2s_pll_cfg *i2s_pll_get_cfg(unsigned long prate) in i2s_pll_get_cfg() argument
91 switch (prate) { in i2s_pll_get_cfg()
115 unsigned long *prate) in i2s_pll_round_rate() argument
118 const struct i2s_pll_cfg *pll_cfg = i2s_pll_get_cfg(*prate); in i2s_pll_round_rate()
122 dev_err(clk->dev, "invalid parent rate=%ld\n", *prate); in i2s_pll_round_rate()
/Linux-v5.4/drivers/gpu/drm/pl111/
Dpl111_display.c448 unsigned long *prate, bool set_parent) in pl111_clk_div_choose_div() argument
462 this_prate = *prate; in pl111_clk_div_choose_div()
473 *prate = best_prate; in pl111_clk_div_choose_div()
478 unsigned long *prate) in pl111_clk_div_round_rate() argument
480 int div = pl111_clk_div_choose_div(hw, rate, prate, true); in pl111_clk_div_round_rate()
482 return DIV_ROUND_UP_ULL(*prate, div); in pl111_clk_div_round_rate()
486 unsigned long prate) in pl111_clk_div_recalc_rate() argument
494 return prate; in pl111_clk_div_recalc_rate()
501 return DIV_ROUND_UP_ULL(prate, div); in pl111_clk_div_recalc_rate()
505 unsigned long prate) in pl111_clk_div_set_rate() argument
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/Linux-v5.4/drivers/clk/rockchip/
Dclk-pll.c64 unsigned long drate, unsigned long *prate) in rockchip_pll_round_rate() argument
153 unsigned long prate) in rockchip_rk3036_pll_recalc_rate() argument
157 u64 rate64 = prate; in rockchip_rk3036_pll_recalc_rate()
166 u64 frac_rate64 = prate * cur.frac; in rockchip_rk3036_pll_recalc_rate()
238 unsigned long prate) in rockchip_rk3036_pll_set_rate() argument
244 __func__, __clk_get_name(hw->clk), drate, prate); in rockchip_rk3036_pll_set_rate()
388 unsigned long prate) in rockchip_rk3066_pll_recalc_rate() argument
392 u64 rate64 = prate; in rockchip_rk3066_pll_recalc_rate()
399 return prate; in rockchip_rk3066_pll_recalc_rate()
471 unsigned long prate) in rockchip_rk3066_pll_set_rate() argument
[all …]
/Linux-v5.4/drivers/clk/imx/
Dclk-pllv3.c123 unsigned long *prate) in clk_pllv3_round_rate() argument
125 unsigned long parent_rate = *prate; in clk_pllv3_round_rate()
171 unsigned long *prate) in clk_pllv3_sys_round_rate() argument
173 unsigned long parent_rate = *prate; in clk_pllv3_sys_round_rate()
232 unsigned long *prate) in clk_pllv3_av_round_rate() argument
234 unsigned long parent_rate = *prate; in clk_pllv3_av_round_rate()
361 unsigned long *prate) in clk_pllv3_vf610_round_rate() argument
363 struct clk_pllv3_vf610_mf mf = clk_pllv3_vf610_rate_to_mf(*prate, rate); in clk_pllv3_vf610_round_rate()
365 return clk_pllv3_vf610_mf_to_rate(*prate, mf); in clk_pllv3_vf610_round_rate()
/Linux-v5.4/drivers/clk/zte/
Dclk.c79 unsigned long *prate) in zx_pll_round_rate() argument
242 unsigned long *prate) in zx_audio_round_rate() argument
246 if (rate * 2 > *prate) in zx_audio_round_rate()
249 reg = calc_reg(*prate, rate); in zx_audio_round_rate()
250 return calc_rate(reg, *prate); in zx_audio_round_rate()
405 unsigned long *prate) in zx_audio_div_round_rate() argument
410 audio_calc_reg(zx_audio_div, &divt, rate, *prate); in zx_audio_div_round_rate()
412 return audio_calc_rate(zx_audio_div, divt.frac_reg, divt.int_reg, *prate); in zx_audio_div_round_rate()
/Linux-v5.4/drivers/gpu/drm/atmel-hlcdc/
Datmel_hlcdc_crtc.c73 unsigned long prate; in atmel_hlcdc_crtc_mode_set_nofb() local
103 prate = 2 * clk_get_rate(crtc->dc->hlcdc->sys_clk); in atmel_hlcdc_crtc_mode_set_nofb()
106 div = DIV_ROUND_UP(prate, mode_rate); in atmel_hlcdc_crtc_mode_set_nofb()
112 prate /= 2; in atmel_hlcdc_crtc_mode_set_nofb()
113 div = DIV_ROUND_UP(prate, mode_rate); in atmel_hlcdc_crtc_mode_set_nofb()
117 int div_low = prate / mode_rate; in atmel_hlcdc_crtc_mode_set_nofb()
120 ((prate / div_low - mode_rate) < in atmel_hlcdc_crtc_mode_set_nofb()
121 10 * (mode_rate - prate / div))) in atmel_hlcdc_crtc_mode_set_nofb()
/Linux-v5.4/drivers/clk/sunxi-ng/
Dccu_gate.c88 unsigned long *prate) in ccu_gate_round_rate() argument
101 *prate = clk_hw_round_rate(clk_hw_get_parent(hw), best_parent); in ccu_gate_round_rate()
104 return *prate / div; in ccu_gate_round_rate()
/Linux-v5.4/drivers/clk/h8300/
Dclk-h8s2678.c38 unsigned long *prate) in pll_round_rate() argument
49 offset[i] = abs(rate - (*prate * (1 << i))); in pll_round_rate()
56 return *prate * (1 << m); in pll_round_rate()
/Linux-v5.4/drivers/clk/mmp/
Dclk-frac.c28 unsigned long *prate) in clk_factor_round_rate() argument
36 rate = (((*prate / 10000) * factor->ftbl[i].den) / in clk_factor_round_rate()
75 unsigned long prate) in clk_factor_set_rate() argument
85 rate = (((prate / 10000) * factor->ftbl[i].den) / in clk_factor_set_rate()

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