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Searched refs:pptable (Results 1 – 20 of 20) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/powerplay/hwmgr/
Dvega20_processpptables.c67 static void dump_pptable(PPTable_t *pptable)
71 pr_info("Version = 0x%08x\n", pptable->Version);
73 pr_info("FeaturesToRun[0] = 0x%08x\n", pptable->FeaturesToRun[0]);
74 pr_info("FeaturesToRun[1] = 0x%08x\n", pptable->FeaturesToRun[1]);
76 pr_info("SocketPowerLimitAc0 = %d\n", pptable->SocketPowerLimitAc0);
77 pr_info("SocketPowerLimitAc0Tau = %d\n", pptable->SocketPowerLimitAc0Tau);
78 pr_info("SocketPowerLimitAc1 = %d\n", pptable->SocketPowerLimitAc1);
79 pr_info("SocketPowerLimitAc1Tau = %d\n", pptable->SocketPowerLimitAc1Tau);
80 pr_info("SocketPowerLimitAc2 = %d\n", pptable->SocketPowerLimitAc2);
81 pr_info("SocketPowerLimitAc2Tau = %d\n", pptable->SocketPowerLimitAc2Tau);
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Dprocess_pptables_v1_0.c209 (struct phm_ppt_v1_information *)(hwmgr->pptable); in get_platform_power_management_table()
252 …t phm_ppt_v1_information *pp_table_information = (struct phm_ppt_v1_information *)(hwmgr->pptable); in init_dpm_2_parameters()
500 (struct phm_ppt_v1_information *)(hwmgr->pptable); in get_pcie_table()
738 (struct phm_ppt_v1_information *)(hwmgr->pptable); in get_gpio_table()
770 (struct phm_ppt_v1_information *)(hwmgr->pptable); in init_clock_voltage_dependency()
1065 hwmgr->pptable = kzalloc(sizeof(struct phm_ppt_v1_information), GFP_KERNEL); in pp_tables_v1_0_initialize()
1067 PP_ASSERT_WITH_CODE((NULL != hwmgr->pptable), in pp_tables_v1_0_initialize()
1112 (struct phm_ppt_v1_information *)(hwmgr->pptable); in pp_tables_v1_0_uninitialize()
1150 kfree(hwmgr->pptable); in pp_tables_v1_0_uninitialize()
1151 hwmgr->pptable = NULL; in pp_tables_v1_0_uninitialize()
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Dvega12_processpptables.c196 (struct phm_ppt_v3_information *)hwmgr->pptable; in init_powerplay_table_information()
271 hwmgr->pptable = kzalloc(sizeof(struct phm_ppt_v3_information), GFP_KERNEL); in vega12_pp_tables_initialize()
272 PP_ASSERT_WITH_CODE((hwmgr->pptable != NULL), in vega12_pp_tables_initialize()
298 (struct phm_ppt_v3_information *)(hwmgr->pptable); in vega12_pp_tables_uninitialize()
315 kfree(hwmgr->pptable); in vega12_pp_tables_uninitialize()
316 hwmgr->pptable = NULL; in vega12_pp_tables_uninitialize()
Dvega10_hwmgr.c195 (struct phm_ppt_v2_information *)hwmgr->pptable; in vega10_set_features_platform_caps()
305 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_odn_initial_default_setting()
522 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_get_socclk_for_voltage_evv()
559 (struct phm_ppt_v2_information *)hwmgr->pptable; in vega10_get_evv_voltages()
664 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_patch_voltage_dependency_tables_with_lookup_table()
742 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_complete_dependency_tables()
771 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_set_private_data_based_on_pptable()
1157 (struct phm_ppt_v2_information *)hwmgr->pptable; in vega10_construct_voltage_tables()
1246 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_setup_default_pcie_table()
1294 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_setup_default_dpm_tables()
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Dvega10_processpptables.c813 (struct phm_ppt_v2_information *)(hwmgr->pptable); in get_pcie_table()
908 (struct phm_ppt_v2_information *)(hwmgr->pptable); in init_powerplay_extended_tables()
1100 (struct phm_ppt_v2_information *)(hwmgr->pptable); in init_dpm_2_parameters()
1187 hwmgr->pptable = kzalloc(sizeof(struct phm_ppt_v2_information), GFP_KERNEL); in vega10_pp_tables_initialize()
1189 PP_ASSERT_WITH_CODE((hwmgr->pptable != NULL), in vega10_pp_tables_initialize()
1234 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_pp_tables_uninitialize()
1272 kfree(hwmgr->pptable); in vega10_pp_tables_uninitialize()
1273 hwmgr->pptable = NULL; in vega10_pp_tables_uninitialize()
Dsmu7_hwmgr.c254 (struct phm_ppt_v1_information *)hwmgr->pptable; in smu7_construct_voltage_tables()
531 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_setup_default_pcie_table()
758 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_setup_dpm_tables_v1()
824 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_odn_initial_default_setting()
869 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_setup_voltage_range_from_vbios()
897 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_check_dpm_table_updated()
1553 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_init_dpm_defaults()
1702 (struct phm_ppt_v1_information *)hwmgr->pptable; in smu7_get_evv_voltages()
1835 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_patch_clock_voltage_limits_with_vddc_leakage()
1849 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_patch_voltage_dependency_tables_with_lookup_table()
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Dsmu_helper.c466 (struct phm_ppt_v1_information *)(hwmgr->pptable); in phm_get_sclk_for_voltage_evv()
496 struct phm_ppt_v1_information *pptable_info = (struct phm_ppt_v1_information *)(hwmgr->pptable); in phm_initializa_dynamic_state_adjustment_rule_settings()
536 (struct phm_ppt_v1_information *)hwmgr->pptable; in phm_apply_dal_min_voltage_request()
Dvega20_hwmgr.c790 (struct phm_ppt_v3_information *)hwmgr->pptable; in vega20_init_smc_table()
1013 (struct phm_ppt_v3_information *)hwmgr->pptable; in vega20_od8_set_feature_capabilities()
1213 (struct phm_ppt_v3_information *)hwmgr->pptable; in vega20_od8_initialize_default_settings()
2743 (struct phm_ppt_v2_information *)hwmgr->pptable; in vega20_get_dal_power_level()
3259 (struct phm_ppt_v3_information *)hwmgr->pptable; in vega20_print_clock_levels()
3260 PPTable_t *pptable = (PPTable_t *)pptable_information->smc_pptable; in vega20_print_clock_levels() local
3366 gen_speed = pptable->PcieGenSpeed[i]; in vega20_print_clock_levels()
3367 lane_width = pptable->PcieLaneCount[i]; in vega20_print_clock_levels()
3380 pptable->LclkFreq[i], in vega20_print_clock_levels()
Dsmu10_hwmgr.c410 struct smu10_voltage_dependency_table **pptable, in smu10_get_clock_voltage_dependency_table() argument
430 *pptable = ptable; in smu10_get_clock_voltage_dependency_table()
Dvega10_powertune.c1289 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_initialize_power_tune_defaults()
1339 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_enable_power_containment()
Dsmu7_powertune.c1113 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_enable_power_containment()
1198 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_power_control_set_level()
Dvega12_hwmgr.c737 (struct phm_ppt_v3_information *)hwmgr->pptable; in vega12_init_smc_table()
1685 (struct phm_ppt_v2_information *)hwmgr->pptable; in vega12_get_dal_power_level()
/Linux-v5.4/drivers/gpu/drm/amd/powerplay/
Darcturus_ppt.c886 PPTable_t *pptable = smu->smu_table.driver_pptable; in arcturus_get_thermal_temperature_range() local
891 range->max = pptable->TedgeLimit * in arcturus_get_thermal_temperature_range()
893 range->edge_emergency_max = (pptable->TedgeLimit + CTF_OFFSET_EDGE) * in arcturus_get_thermal_temperature_range()
895 range->hotspot_crit_max = pptable->ThotspotLimit * in arcturus_get_thermal_temperature_range()
897 range->hotspot_emergency_max = (pptable->ThotspotLimit + CTF_OFFSET_HOTSPOT) * in arcturus_get_thermal_temperature_range()
899 range->mem_crit_max = pptable->TmemLimit * in arcturus_get_thermal_temperature_range()
901 range->mem_emergency_max = (pptable->TmemLimit + CTF_OFFSET_HBM)* in arcturus_get_thermal_temperature_range()
1015 PPTable_t *pptable = table_context->driver_pptable; in arcturus_read_sensor() local
1024 *(uint32_t *)data = pptable->FanMaximumRpm; in arcturus_read_sensor()
1074 PPTable_t *pptable = smu->smu_table.driver_pptable; in arcturus_get_fan_speed_percent() local
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Dvega20_ppt.c956 PPTable_t *pptable = (PPTable_t *)table_context->driver_pptable; in vega20_print_clk_levels() local
1068 (pptable->PcieGenSpeed[i] == 0) ? "2.5GT/s," : in vega20_print_clk_levels()
1069 (pptable->PcieGenSpeed[i] == 1) ? "5.0GT/s," : in vega20_print_clk_levels()
1070 (pptable->PcieGenSpeed[i] == 2) ? "8.0GT/s," : in vega20_print_clk_levels()
1071 (pptable->PcieGenSpeed[i] == 3) ? "16.0GT/s," : "", in vega20_print_clk_levels()
1072 (pptable->PcieLaneCount[i] == 1) ? "x1" : in vega20_print_clk_levels()
1073 (pptable->PcieLaneCount[i] == 2) ? "x2" : in vega20_print_clk_levels()
1074 (pptable->PcieLaneCount[i] == 3) ? "x4" : in vega20_print_clk_levels()
1075 (pptable->PcieLaneCount[i] == 4) ? "x8" : in vega20_print_clk_levels()
1076 (pptable->PcieLaneCount[i] == 5) ? "x12" : in vega20_print_clk_levels()
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Dnavi10_ppt.c669 PPTable_t *pptable = smu->smu_table.driver_pptable; in navi10_is_support_fine_grained_dpm() local
674 dpm_desc = &pptable->DpmDescriptor[clk_index]; in navi10_is_support_fine_grained_dpm()
1021 PPTable_t *pptable = smu->smu_table.driver_pptable; in navi10_get_fan_speed_percent() local
1027 percent = current_rpm * 100 / pptable->FanMaximumRpm; in navi10_get_fan_speed_percent()
1390 PPTable_t *pptable = table_context->driver_pptable; in navi10_read_sensor() local
1398 *(uint32_t *)data = pptable->FanMaximumRpm; in navi10_read_sensor()
1554 PPTable_t *pptable = smu->smu_table.driver_pptable; in navi10_get_power_limit() local
1575 if (!pptable) { in navi10_get_power_limit()
1580 pptable->SocketPowerLimitAc[PPT_THROTTLER_PPT0]; in navi10_get_power_limit()
/Linux-v5.4/drivers/gpu/drm/amd/powerplay/smumgr/
Dvegam_smumgr.c336 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_update_uvd_smc_table()
368 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_update_vce_smc_table()
399 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_update_bif_smc_table()
434 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_initialize_power_tune_defaults()
506 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_cac_table()
543 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_ulv_level()
814 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_single_graphic_level()
867 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_all_graphic_levels()
983 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_single_memory_level()
1087 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_mvdd_value()
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Dfiji_smumgr.c473 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_initialize_power_tune_defaults()
495 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_bapm_parameters_in_dpm_table()
589 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_tdc_limit()
675 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_bapm_vddc_base_leakage_sidd()
763 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_cac_table()
803 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_ulv_level()
946 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_single_graphic_level()
1010 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_all_graphic_levels()
1170 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_single_memory_level()
1280 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_mvdd_value()
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Dpolaris10_smumgr.c431 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_bapm_parameters_in_dpm_table()
490 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_tdc_limit()
570 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_bapm_vddc_base_leakage_sidd()
705 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_cac_table()
739 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_ulv_level()
914 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_single_graphic_level()
983 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_all_graphic_levels()
1076 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_single_memory_level()
1179 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_mvdd_value()
1206 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_smc_acpi_level()
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Dtonga_smumgr.c253 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_get_dependency_volt_by_clk()
398 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_cac_tables()
483 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_ulv_level()
624 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_single_graphic_level()
690 struct phm_ppt_v1_information *pptable_info = (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_all_graphic_levels()
967 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_single_memory_level()
1148 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_mvdd_value()
1316 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_smc_uvd_level()
1376 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_smc_vce_level()
1421 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_smc_acp_level()
[all …]
/Linux-v5.4/drivers/gpu/drm/amd/powerplay/inc/
Dhwmgr.h757 void *pptable; member