Searched refs:ppll_div_3 (Results 1 – 4 of 4) sorted by relevance
1351 save->ppll_div_3 = INPLL(PPLL_DIV_3); in radeon_save_state()1372 (mode->ppll_div_3 == (INPLL(PPLL_DIV_3) & in radeon_write_pll_regs()1421 OUTPLLP(PPLL_DIV_3, mode->ppll_div_3, ~PPLL_FB3_DIV_MASK); in radeon_write_pll_regs()1422 OUTPLLP(PPLL_DIV_3, mode->ppll_div_3, ~PPLL_POST3_DIV_MASK); in radeon_write_pll_regs()1640 regs->ppll_div_3 = fb_div | (post_div->bitvalue << 16); in radeon_calc_pll_regs()1644 pr_debug("ppll_div_3 = 0x%x\n", regs->ppll_div_3); in radeon_calc_pll_regs()1708 newmode->ppll_div_3 = rinfo->panel_info.fbk_divider | in radeonfb_set_par()
236 u32 ppll_div_3; member
879 uint32_t *ppll_div_3, uint32_t *pixclks_cntl) in radeon_legacy_tv_adjust_pll1() argument892 *ppll_div_3 = (const_ptr->crtcPLL_N & 0x7ff) | (get_post_div(const_ptr->crtcPLL_post_div) << 16); in radeon_legacy_tv_adjust_pll1()
962 uint32_t *ppll_div_3, uint32_t *pixclks_cntl);
