| /Linux-v5.4/arch/mips/ath79/ |
| D | clock.c | 238 u32 pll, out_div, ref_div, nint, nfrac, frac, clk_ctrl, postdiv; in ar934x_clocks_init() local
309 postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_SHIFT) & in ar934x_clocks_init()
315 cpu_rate = cpu_pll / (postdiv + 1); in ar934x_clocks_init()
317 cpu_rate = ddr_pll / (postdiv + 1); in ar934x_clocks_init()
319 postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_POST_DIV_SHIFT) & in ar934x_clocks_init()
325 ddr_rate = ddr_pll / (postdiv + 1); in ar934x_clocks_init()
327 ddr_rate = cpu_pll / (postdiv + 1); in ar934x_clocks_init()
329 postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_POST_DIV_SHIFT) & in ar934x_clocks_init()
335 ahb_rate = ddr_pll / (postdiv + 1); in ar934x_clocks_init()
337 ahb_rate = cpu_pll / (postdiv + 1); in ar934x_clocks_init()
[all …]
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| /Linux-v5.4/drivers/clk/mediatek/ |
| D | clk-pll.c | 63 u32 pcw, int postdiv) in __mtk_pll_recalc_rate() argument
86 return ((unsigned long)vco + postdiv - 1) / postdiv; in __mtk_pll_recalc_rate()
116 int postdiv) in mtk_pll_set_rate_regs() argument
126 val |= (ffs(postdiv) - 1) << pll->data->pd_shift; in mtk_pll_set_rate_regs()
159 static void mtk_pll_calc_values(struct mtk_clk_pll *pll, u32 *pcw, u32 *postdiv, in mtk_pll_calc_values() argument
179 *postdiv = 1 << val; in mtk_pll_calc_values()
182 *postdiv = 1 << val; in mtk_pll_calc_values()
183 if ((u64)freq * *postdiv >= fmin) in mtk_pll_calc_values()
201 u32 postdiv; in mtk_pll_set_rate() local
203 mtk_pll_calc_values(pll, &pcw, &postdiv, rate, parent_rate); in mtk_pll_set_rate()
[all …]
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| /Linux-v5.4/arch/mips/ar7/ |
| D | clock.c | 72 u32 postdiv; member
99 int *postdiv, int *mul) in approximate() argument
110 *postdiv = k; in approximate()
115 static void calculate(int base, int target, int *prediv, int *postdiv, in calculate() argument
124 *postdiv = tmp_base / tmp_gcd; in calculate()
127 if ((*postdiv > 0) & (*postdiv <= 32)) in calculate()
131 if (base / *prediv * *mul / *postdiv != target) { in calculate()
132 approximate(base, target, prediv, postdiv, mul); in calculate()
133 tmp_freq = base / *prediv * *mul / *postdiv; in calculate()
140 *prediv, *postdiv, *mul); in calculate()
[all …]
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| /Linux-v5.4/drivers/clk/keystone/ |
| D | pll.c | 60 u32 postdiv; member
81 u32 mult = 0, prediv, postdiv, val; in clk_pllclk_recalc() local
100 postdiv = ((val & pll_data->clkod_mask) >> in clk_pllclk_recalc()
103 postdiv = readl(pll_data->pllod); in clk_pllclk_recalc()
104 postdiv = ((postdiv & pll_data->clkod_mask) >> in clk_pllclk_recalc()
107 postdiv = pll_data->postdiv; in clk_pllclk_recalc()
111 rate /= postdiv; in clk_pllclk_recalc()
172 if (of_property_read_u32(node, "fixed-postdiv", &pll_data->postdiv)) { in _of_pll_clk_init()
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| /Linux-v5.4/arch/c6x/platforms/ |
| D | pll.c | 267 u32 ctrl, mult = 0, prediv = 0, postdiv = 0; in clk_pllclk_recalc() local
295 postdiv = pll_read(pll, PLLPOST); in clk_pllclk_recalc()
296 if (postdiv & PLLDIV_EN) in clk_pllclk_recalc()
297 postdiv = (postdiv & PLLDIV_RATIO_MASK) + 1; in clk_pllclk_recalc()
299 postdiv = 1; in clk_pllclk_recalc()
307 if (postdiv) in clk_pllclk_recalc()
308 rate /= postdiv; in clk_pllclk_recalc()
313 prediv, mult, postdiv, rate / 1000000); in clk_pllclk_recalc()
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| /Linux-v5.4/drivers/gpu/drm/msm/dsi/pll/ |
| D | dsi_pll_14nm.c | 680 struct dsi_pll_14nm_postdiv *postdiv = to_pll_14nm_postdiv(hw); in dsi_pll_14nm_postdiv_recalc_rate() local
681 struct dsi_pll_14nm *pll_14nm = postdiv->pll; in dsi_pll_14nm_postdiv_recalc_rate()
683 u8 shift = postdiv->shift; in dsi_pll_14nm_postdiv_recalc_rate()
684 u8 width = postdiv->width; in dsi_pll_14nm_postdiv_recalc_rate()
693 postdiv->flags, width); in dsi_pll_14nm_postdiv_recalc_rate()
700 struct dsi_pll_14nm_postdiv *postdiv = to_pll_14nm_postdiv(hw); in dsi_pll_14nm_postdiv_round_rate() local
701 struct dsi_pll_14nm *pll_14nm = postdiv->pll; in dsi_pll_14nm_postdiv_round_rate()
706 postdiv->width, in dsi_pll_14nm_postdiv_round_rate()
707 postdiv->flags); in dsi_pll_14nm_postdiv_round_rate()
713 struct dsi_pll_14nm_postdiv *postdiv = to_pll_14nm_postdiv(hw); in dsi_pll_14nm_postdiv_set_rate() local
[all …]
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| /Linux-v5.4/drivers/clk/imx/ |
| D | clk-composite-8m.c | 50 int *prediv, int *postdiv) in imx8m_clk_composite_compute_dividers() argument
57 *postdiv = 1; in imx8m_clk_composite_compute_dividers()
65 *postdiv = div2; in imx8m_clk_composite_compute_dividers()
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| /Linux-v5.4/arch/arm/mach-davinci/ |
| D | da850.c | 361 unsigned int postdiv; member
370 .postdiv = 1,
379 .postdiv = 1,
388 .postdiv = 1,
397 .postdiv = 2,
406 .postdiv = 3,
415 .postdiv = 5,
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| /Linux-v5.4/Documentation/devicetree/bindings/clock/ |
| D | keystone-pll.txt | 20 - fixed-postdiv : fixed post divider value. If absent, use clkod register bits
21 for postdiv
30 fixed-postdiv = <2>;
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| /Linux-v5.4/drivers/video/fbdev/ |
| D | gxt4500.c | 238 int m, n, pdiv1, pdiv2, postdiv; in calc_pll() local
248 postdiv = pdiv1 * pdiv2; in calc_pll()
249 pll_period = DIV_ROUND_UP(period_ps, postdiv); in calc_pll()
257 n = intf * postdiv / period_ps; in calc_pll()
260 t = par->refclk_ps * m * postdiv / n; in calc_pll()
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| /Linux-v5.4/drivers/clk/ |
| D | clk-axm5516.c | 52 unsigned long rate, fbdiv, refdiv, postdiv; in axxia_pllclk_recalc() local
56 postdiv = ((control >> 0) & 0xf) + 1; in axxia_pllclk_recalc()
59 rate = (parent_rate / (refdiv * postdiv)) * fbdiv; in axxia_pllclk_recalc()
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| /Linux-v5.4/drivers/phy/rockchip/ |
| D | phy-rockchip-inno-hdmi.c | 270 u8 postdiv; member
913 if (cfg->postdiv == 1) { in inno_hdmi_phy_rk3228_power_on()
917 int div = cfg->postdiv / 2 - 1; in inno_hdmi_phy_rk3228_power_on()
1019 if (cfg->postdiv == 1) { in inno_hdmi_phy_rk3328_power_on()
1024 v = (cfg->postdiv / 2) - 1; in inno_hdmi_phy_rk3328_power_on()
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| /Linux-v5.4/drivers/gpu/drm/amd/powerplay/smumgr/ |
| D | vegam_smumgr.c | 680 table->SclkFcwRangeTable[i].postdiv = in vegam_get_sclk_range_table()
699 (ref_clk * Range_Table[i].fcw_trans_lower) >> Range_Table[i].postdiv; in vegam_get_sclk_range_table()
701 (ref_clk * Range_Table[i].fcw_trans_upper) >> Range_Table[i].postdiv; in vegam_get_sclk_range_table()
704 table->SclkFcwRangeTable[i].postdiv = Range_Table[i].postdiv; in vegam_get_sclk_range_table()
757 ((clock << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv) / in vegam_calculate_sclk_params()
759 temp = clock << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv; in vegam_calculate_sclk_params()
767 ((pcc_target_freq << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv) / in vegam_calculate_sclk_params()
776 ((ss_target_freq << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv) / in vegam_calculate_sclk_params()
778 temp = ss_target_freq << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv; in vegam_calculate_sclk_params()
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| D | polaris10_smumgr.c | 811 table->SclkFcwRangeTable[i].postdiv = range_table_from_vbios.entry[i].ucPostdiv; in polaris10_get_sclk_range_table()
825 …le[i].trans_lower_frequency = (ref_clk * Range_Table[i].fcw_trans_lower) >> Range_Table[i].postdiv; in polaris10_get_sclk_range_table()
826 …le[i].trans_upper_frequency = (ref_clk * Range_Table[i].fcw_trans_upper) >> Range_Table[i].postdiv; in polaris10_get_sclk_range_table()
829 table->SclkFcwRangeTable[i].postdiv = Range_Table[i].postdiv; in polaris10_get_sclk_range_table()
881 …_int = (uint16_t)((clock << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv) / ref_clock); in polaris10_calculate_sclk_params()
882 temp = clock << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv; in polaris10_calculate_sclk_params()
889 …nt16_t)((pcc_target_freq << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv) / ref_clock); in polaris10_calculate_sclk_params()
896 …int16_t)((ss_target_freq << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv) / ref_clock); in polaris10_calculate_sclk_params()
897 temp = ss_target_freq << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv; in polaris10_calculate_sclk_params()
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| /Linux-v5.4/drivers/media/i2c/ |
| D | ov2659.c | 912 u32 prediv, postdiv, mult; in ov2659_pll_calc_params() local
918 postdiv = ctrl1[i].div; in ov2659_pll_calc_params()
925 actual /= postdiv; in ov2659_pll_calc_params()
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| /Linux-v5.4/drivers/gpu/drm/amd/powerplay/inc/ |
| D | smu74_discrete.h | 45 uint8_t postdiv; member
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| D | smu75_discrete.h | 44 uint8_t postdiv; /* divide by 2^n */ member
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| /Linux-v5.4/drivers/gpu/drm/radeon/ |
| D | rv770_dpm.c | 342 static int rv770_encode_yclk_post_div(u32 postdiv, u32 *encoded_postdiv) in rv770_encode_yclk_post_div() argument
346 switch (postdiv) { in rv770_encode_yclk_post_div()
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