| /Linux-v5.4/drivers/clk/qcom/ |
| D | clk-alpha-pll.c | 1204 if (pll->post_div_table[i].val == val) { in clk_alpha_pll_postdiv_fabia_recalc_rate()
1205 div = pll->post_div_table[i].div; in clk_alpha_pll_postdiv_fabia_recalc_rate()
1226 if (pll->post_div_table[i].val == val) { in clk_trion_pll_postdiv_recalc_rate()
1227 div = pll->post_div_table[i].div; in clk_trion_pll_postdiv_recalc_rate()
1241 return divider_round_rate(hw, rate, prate, pll->post_div_table, in clk_trion_pll_postdiv_round_rate()
1255 if (pll->post_div_table[i].div == div) { in clk_trion_pll_postdiv_set_rate()
1256 val = pll->post_div_table[i].val; in clk_trion_pll_postdiv_set_rate()
1278 return divider_round_rate(hw, rate, prate, pll->post_div_table, in clk_alpha_pll_postdiv_fabia_round_rate()
1301 if (pll->post_div_table[i].div == div) { in clk_alpha_pll_postdiv_fabia_set_rate()
1302 val = pll->post_div_table[i].val; in clk_alpha_pll_postdiv_fabia_set_rate()
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| D | clk-alpha-pll.h | 87 const struct clk_div_table *post_div_table; member
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| D | camcc-sdm845.c | 69 .post_div_table = post_div_table_fabia_even,
97 .post_div_table = post_div_table_fabia_even,
125 .post_div_table = post_div_table_fabia_even,
153 .post_div_table = post_div_table_fabia_even,
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| D | gcc-sdm845.c | 194 .post_div_table = post_div_table_fabia_even,
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| D | gcc-sm8150.c | 71 .post_div_table = post_div_table_trion_even,
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| /Linux-v5.4/drivers/clk/imx/ |
| D | clk-imx6sll.c | 59 static const struct clk_div_table post_div_table[] = { variable
192 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock); in imx6sll_clocks_init()
196 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock); in imx6sll_clocks_init()
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| D | clk-imx6sl.c | 78 static const struct clk_div_table post_div_table[] = { variable
272 …v", "pll4_audio", CLK_SET_RATE_PARENT, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock… in imx6sl_clocks_init()
274 …v", "pll5_video", CLK_SET_RATE_PARENT, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock… in imx6sl_clocks_init()
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| D | clk-imx6q.c | 102 static struct clk_div_table post_div_table[] = { variable
469 post_div_table[1].div = 1; in imx6q_clocks_init()
470 post_div_table[2].div = 1; in imx6q_clocks_init()
600 …post_div", "pll4_audio", CLK_SET_RATE_PARENT, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock… in imx6q_clocks_init()
602 …post_div", "pll5_video", CLK_SET_RATE_PARENT, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock… in imx6q_clocks_init()
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| D | clk-imx6ul.c | 82 static const struct clk_div_table post_div_table[] = { variable
219 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock); in imx6ul_clocks_init()
223 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock); in imx6ul_clocks_init()
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| D | clk-imx6sx.c | 95 static const struct clk_div_table post_div_table[] = { variable
255 CLK_SET_RATE_PARENT, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock); in imx6sx_clocks_init()
259 CLK_SET_RATE_PARENT, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock); in imx6sx_clocks_init()
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| D | clk-imx7d.c | 35 static const struct clk_div_table post_div_table[] = { variable
446 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0xf0, 22, 2, 0, post_div_table, &imx_ccm_lock); in imx7d_clocks_init()
450 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x130, 22, 2, 0, post_div_table, &imx_ccm_lock); in imx7d_clocks_init()
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