Searched refs:plla (Results 1 – 15 of 15) sorted by relevance
| /Linux-v5.4/Documentation/devicetree/bindings/clock/ |
| D | renesas,r8a7778-cpg-clocks.txt | 14 "plla", "pllb", "b", "out", "p", "s", and "s1".
33 clock-output-names = "plla", "pllb", "b",
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| D | renesas,r8a7779-cpg-clocks.txt | 15 - clock-output-names: The names of the clocks. Supported clocks are "plla",
35 clock-output-names = "plla", "z", "zs", "s", "s1", "p",
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| D | vt8500.txt | 59 plla: plla {
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| /Linux-v5.4/arch/arm/boot/dts/ |
| D | wm8650.dtsi | 85 plla: plla { label
123 clocks = <&plla>;
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| D | ox820.dtsi | 64 plla: plla { label
75 clocks = <&plla>;
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| D | wm8850.dtsi | 88 plla: plla { label
140 clocks = <&plla>;
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| D | wm8505.dtsi | 88 plla: plla { label
119 clocks = <&plla>;
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| D | wm8750.dtsi | 91 plla: plla { label
129 clocks = <&plla>;
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| D | at91rm9200.dtsi | 122 plla: pllack { label
150 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
167 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
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| D | at91sam9n12.dtsi | 147 plla: pllack { label
168 clocks = <&plla>;
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| D | at91sam9g45.dtsi | 149 plla: pllack { label
170 clocks = <&plla>;
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| D | r8a7779.dtsi | 505 clock-output-names = "plla", "z", "zs", "s",
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| D | r8a7778.dtsi | 492 clock-output-names = "plla", "pllb", "b",
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| D | sama5d3.dtsi | 1025 plla: pllack { label
1040 clocks = <&plla>;
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| /Linux-v5.4/drivers/clk/tegra/ |
| D | clk-tegra210.c | 754 static void tegra210_plla_set_defaults(struct tegra_clk_pll *plla) in tegra210_plla_set_defaults() argument
757 u32 val = readl_relaxed(clk_base + plla->params->base_reg); in tegra210_plla_set_defaults()
759 plla->params->defaults_set = true; in tegra210_plla_set_defaults()
768 plla->params->defaults_set = false; in tegra210_plla_set_defaults()
775 _pll_misc_chk_default(clk_base, plla->params, 0, val, in tegra210_plla_set_defaults()
779 _pll_misc_chk_default(clk_base, plla->params, 2, val, in tegra210_plla_set_defaults()
783 val = readl_relaxed(clk_base + plla->params->ext_misc_reg[0]); in tegra210_plla_set_defaults()
786 writel_relaxed(val, clk_base + plla->params->ext_misc_reg[0]); in tegra210_plla_set_defaults()
794 writel_relaxed(val, clk_base + plla->params->base_reg); in tegra210_plla_set_defaults()
796 clk_base + plla->params->ext_misc_reg[0]); in tegra210_plla_set_defaults()
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