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Searched refs:pll_read (Results 1 – 13 of 13) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/msm/dsi/pll/
Ddsi_pll_28nm_8960.c93 val = pll_read(pll_28nm->mmio + REG_DSI_28nm_8960_PHY_PLL_RDY); in pll_28nm_poll_for_ready()
126 val = pll_read(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_2); in dsi_pll_28nm_clk_set_rate()
133 val = pll_read(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_3); in dsi_pll_28nm_clk_set_rate()
143 val = pll_read(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_8); in dsi_pll_28nm_clk_set_rate()
171 status = pll_read(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_0); in dsi_pll_28nm_clk_recalc_rate()
174 fb_divider = pll_read(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_1); in dsi_pll_28nm_clk_recalc_rate()
176 temp = pll_read(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_2) & 0x07; in dsi_pll_28nm_clk_recalc_rate()
180 ref_divider = pll_read(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_3); in dsi_pll_28nm_clk_recalc_rate()
224 div = pll_read(bytediv->reg) & 0xff; in clk_bytediv_recalc_rate()
270 val = pll_read(bytediv->reg); in clk_bytediv_set_rate()
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Ddsi_pll_28nm.c98 val = pll_read(pll_28nm->mmio + REG_DSI_28nm_PHY_PLL_STATUS); in pll_28nm_poll_for_ready()
184 sdm_cfg1 = pll_read(base + REG_DSI_28nm_PHY_PLL_SDM_CFG1); in dsi_pll_28nm_clk_set_rate()
266 doubler = pll_read(base + REG_DSI_28nm_PHY_PLL_REFCLK_CFG) & in dsi_pll_28nm_clk_recalc_rate()
271 sdm0 = pll_read(base + REG_DSI_28nm_PHY_PLL_SDM_CFG0); in dsi_pll_28nm_clk_recalc_rate()
275 pll_read(base + REG_DSI_28nm_PHY_PLL_SDM_CFG0), in dsi_pll_28nm_clk_recalc_rate()
281 pll_read(base + REG_DSI_28nm_PHY_PLL_SDM_CFG1), in dsi_pll_28nm_clk_recalc_rate()
284 sdm2 = FIELD(pll_read(base + REG_DSI_28nm_PHY_PLL_SDM_CFG2), in dsi_pll_28nm_clk_recalc_rate()
286 sdm3 = FIELD(pll_read(base + REG_DSI_28nm_PHY_PLL_SDM_CFG3), in dsi_pll_28nm_clk_recalc_rate()
446 pll_read(base + REG_DSI_28nm_PHY_PLL_POSTDIV3_CFG); in dsi_pll_28nm_save_state()
448 pll_read(base + REG_DSI_28nm_PHY_PLL_POSTDIV1_CFG); in dsi_pll_28nm_save_state()
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Ddsi_pll_10nm.c368 u32 data = pll_read(pll->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_CTRL_0); in dsi_pll_disable_pll_bias()
378 u32 data = pll_read(pll->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_CTRL_0); in dsi_pll_enable_pll_bias()
390 data = pll_read(pll->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_CLK_CFG1); in dsi_pll_disable_global_clk()
399 data = pll_read(pll->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_CLK_CFG1); in dsi_pll_enable_global_clk()
488 dec = pll_read(base + REG_DSI_10nm_PHY_PLL_DECIMAL_DIV_START_1); in dsi_pll_10nm_vco_recalc_rate()
491 frac = pll_read(base + REG_DSI_10nm_PHY_PLL_FRAC_DIV_START_LOW_1); in dsi_pll_10nm_vco_recalc_rate()
492 frac |= ((pll_read(base + REG_DSI_10nm_PHY_PLL_FRAC_DIV_START_MID_1) & in dsi_pll_10nm_vco_recalc_rate()
494 frac |= ((pll_read(base + REG_DSI_10nm_PHY_PLL_FRAC_DIV_START_HIGH_1) & in dsi_pll_10nm_vco_recalc_rate()
534 cached->pll_out_div = pll_read(pll_10nm->mmio + in dsi_pll_10nm_save_state()
538 cmn_clk_cfg0 = pll_read(phy_base + REG_DSI_10nm_PHY_CMN_CLK_CFG0); in dsi_pll_10nm_save_state()
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Ddsi_pll_14nm.c185 val = pll_read(base + in pll_14nm_poll_for_ready()
198 val = pll_read(base + in pll_14nm_poll_for_ready()
635 dec_start = pll_read(base + REG_DSI_14nm_PHY_PLL_DEC_START); in dsi_pll_14nm_vco_recalc_rate()
640 div_frac_start = (pll_read(base + REG_DSI_14nm_PHY_PLL_DIV_FRAC_START3) in dsi_pll_14nm_vco_recalc_rate()
642 div_frac_start |= (pll_read(base + REG_DSI_14nm_PHY_PLL_DIV_FRAC_START2) in dsi_pll_14nm_vco_recalc_rate()
644 div_frac_start |= pll_read(base + REG_DSI_14nm_PHY_PLL_DIV_FRAC_START1) in dsi_pll_14nm_vco_recalc_rate()
689 val = pll_read(base + REG_DSI_14nm_PHY_CMN_CLK_CFG0) >> shift; in dsi_pll_14nm_postdiv_recalc_rate()
731 val = pll_read(base + REG_DSI_14nm_PHY_CMN_CLK_CFG0); in dsi_pll_14nm_postdiv_set_rate()
802 data = pll_read(cmn_base + REG_DSI_14nm_PHY_CMN_CLK_CFG0); in dsi_pll_14nm_save_state()
Ddsi_pll.h47 static inline u32 pll_read(const void __iomem *reg) in pll_read() function
/Linux-v5.4/arch/c6x/platforms/
Dpll.c200 static u32 pll_read(struct pll_data *pll, int reg) in pll_read() function
239 v = pll_read(pll, clk->div); in clk_sysclk_recalc()
275 ctrl = pll_read(pll, PLLCTL); in clk_pllclk_recalc()
284 mult = pll_read(pll, PLLM); in clk_pllclk_recalc()
288 prediv = pll_read(pll, PLLPRE); in clk_pllclk_recalc()
295 postdiv = pll_read(pll, PLLPOST); in clk_pllclk_recalc()
/Linux-v5.4/drivers/gpu/drm/msm/hdmi/
Dhdmi_pll_8960.c242 static inline u32 pll_read(struct hdmi_pll_8960 *pll, u32 reg) in pll_read() function
298 val = pll_read(pll, REG_HDMI_8960_PHY_PLL_PWRDN_B); in hdmi_pll_enable()
307 val = pll_read(pll, REG_HDMI_8960_PHY_PLL_STATUS0); in hdmi_pll_enable()
349 val = pll_read(pll, REG_HDMI_8960_PHY_PLL_PWRDN_B); in hdmi_pll_disable()
/Linux-v5.4/drivers/gpu/drm/radeon/
Datom.h121 uint32_t (* pll_read)(struct card_info *, uint32_t); /* filled by driver */ member
Dradeon_device.c996 atom_card_info->pll_read = cail_pll_read; in radeon_atombios_init()
Datom.c323 val = gctx->card->pll_read(gctx->card, idx); in atom_get_src_int()
/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Datom.h124 uint32_t (* pll_read)(struct card_info *, uint32_t); /* filled by driver */ member
Datom.c317 val = gctx->card->pll_read(gctx->card, idx); in atom_get_src_int()
Damdgpu_atombios.c2028 atom_card_info->pll_read = cail_pll_read; in amdgpu_atombios_init()