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Searched refs:plane_id (Results 1 – 21 of 21) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/i915/display/
Dintel_sprite.c334 bool icl_is_hdr_plane(struct drm_i915_private *dev_priv, enum plane_id plane_id) in icl_is_hdr_plane() argument
337 icl_hdr_plane_mask() & BIT(plane_id); in icl_is_hdr_plane()
427 enum plane_id plane_id = plane->id; in icl_program_input_csc() local
514 I915_WRITE_FW(PLANE_INPUT_CSC_COEFF(pipe, plane_id, 0), ROFF(csc[0]) | in icl_program_input_csc()
516 I915_WRITE_FW(PLANE_INPUT_CSC_COEFF(pipe, plane_id, 1), BOFF(csc[2])); in icl_program_input_csc()
517 I915_WRITE_FW(PLANE_INPUT_CSC_COEFF(pipe, plane_id, 2), ROFF(csc[3]) | in icl_program_input_csc()
519 I915_WRITE_FW(PLANE_INPUT_CSC_COEFF(pipe, plane_id, 3), BOFF(csc[5])); in icl_program_input_csc()
520 I915_WRITE_FW(PLANE_INPUT_CSC_COEFF(pipe, plane_id, 4), ROFF(csc[6]) | in icl_program_input_csc()
522 I915_WRITE_FW(PLANE_INPUT_CSC_COEFF(pipe, plane_id, 5), BOFF(csc[8])); in icl_program_input_csc()
524 I915_WRITE_FW(PLANE_INPUT_CSC_PREOFF(pipe, plane_id, 0), in icl_program_input_csc()
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Dintel_sprite.h34 enum pipe pipe, enum plane_id plane_id);
36 static inline bool icl_is_nv12_y_plane(enum plane_id id) in icl_is_nv12_y_plane()
51 bool icl_is_hdr_plane(struct drm_i915_private *dev_priv, enum plane_id plane_id);
Dintel_atomic_plane.c242 enum plane_id plane_id = plane->id; in skl_next_plane_to_commit() local
245 !(*update_mask & BIT(plane_id))) in skl_next_plane_to_commit()
248 if (skl_ddb_allocation_overlaps(&crtc_state->wm.skl.plane_ddb_y[plane_id], in skl_next_plane_to_commit()
250 I915_MAX_PLANES, plane_id) || in skl_next_plane_to_commit()
251 skl_ddb_allocation_overlaps(&crtc_state->wm.skl.plane_ddb_uv[plane_id], in skl_next_plane_to_commit()
253 I915_MAX_PLANES, plane_id)) in skl_next_plane_to_commit()
256 *update_mask &= ~BIT(plane_id); in skl_next_plane_to_commit()
257 entries_y[plane_id] = crtc_state->wm.skl.plane_ddb_y[plane_id]; in skl_next_plane_to_commit()
258 entries_uv[plane_id] = crtc_state->wm.skl.plane_ddb_uv[plane_id]; in skl_next_plane_to_commit()
Dintel_bw.c269 enum plane_id plane_id; in intel_bw_crtc_data_rate() local
271 for_each_plane_id_on_crtc(crtc, plane_id) { in intel_bw_crtc_data_rate()
276 if (plane_id == PLANE_CURSOR) in intel_bw_crtc_data_rate()
279 data_rate += crtc_state->data_rate[plane_id]; in intel_bw_crtc_data_rate()
Dintel_display.h168 enum plane_id { enum
Dintel_display_types.h1035 enum plane_id id;
Dintel_display.c9798 enum plane_id plane_id = plane->id; in skylake_get_initial_plane_config() local
9821 val = I915_READ(PLANE_CTL(pipe, plane_id)); in skylake_get_initial_plane_config()
9829 alpha = I915_READ(PLANE_COLOR_CTL(pipe, plane_id)); in skylake_get_initial_plane_config()
9889 base = I915_READ(PLANE_SURF(pipe, plane_id)) & 0xfffff000; in skylake_get_initial_plane_config()
9892 offset = I915_READ(PLANE_OFFSET(pipe, plane_id)); in skylake_get_initial_plane_config()
9894 val = I915_READ(PLANE_SIZE(pipe, plane_id)); in skylake_get_initial_plane_config()
9898 val = I915_READ(PLANE_STRIDE(pipe, plane_id)); in skylake_get_initial_plane_config()
/Linux-v5.4/drivers/gpu/drm/i915/
Dintel_pm.c1069 static int g4x_plane_fifo_size(enum plane_id plane_id, int level) in g4x_plane_fifo_size() argument
1085 switch (plane_id) { in g4x_plane_fifo_size()
1093 MISSING_CASE(plane_id); in g4x_plane_fifo_size()
1176 int level, enum plane_id plane_id, u16 value) in g4x_raw_plane_wm_set() argument
1184 dirty |= raw->plane[plane_id] != value; in g4x_raw_plane_wm_set()
1185 raw->plane[plane_id] = value; in g4x_raw_plane_wm_set()
1219 enum plane_id plane_id = plane->id; in g4x_raw_plane_wm_compute() local
1224 dirty |= g4x_raw_plane_wm_set(crtc_state, 0, plane_id, 0); in g4x_raw_plane_wm_compute()
1225 if (plane_id == PLANE_PRIMARY) in g4x_raw_plane_wm_compute()
1235 max_wm = g4x_plane_fifo_size(plane_id, level); in g4x_raw_plane_wm_compute()
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Di915_reg.h6555 #define _VLV_SPR(pipe, plane_id, reg_a, reg_b) \ argument
6556 _PIPE((pipe) * 2 + (plane_id) - PLANE_SPRITE0, (reg_a), (reg_b))
6557 #define _MMIO_VLV_SPR(pipe, plane_id, reg_a, reg_b) \ argument
6558 _MMIO(_VLV_SPR((pipe), (plane_id), (reg_a), (reg_b)))
6560 #define SPCNTR(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPACNTR, _SPBCNTR) argument
6561 #define SPLINOFF(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPALINOFF, _SPBLINOFF) argument
6562 #define SPSTRIDE(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPASTRIDE, _SPBSTRIDE) argument
6563 #define SPPOS(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPAPOS, _SPBPOS) argument
6564 #define SPSIZE(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPASIZE, _SPBSIZE) argument
6565 #define SPKEYMINVAL(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPAKEYMINVAL, _SPBKEYMINVAL) argument
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Di915_drv.h1824 #define INTEL_FRONTBUFFER(pipe, plane_id) ({ \ argument
1827 BIT((plane_id) + INTEL_FRONTBUFFER_BITS_PER_PIPE * (pipe)); \
Di915_debugfs.c2971 enum plane_id plane_id; in i915_ddb_info() local
2975 for_each_plane_id_on_crtc(crtc, plane_id) { in i915_ddb_info()
2976 entry = &crtc_state->wm.skl.plane_ddb_y[plane_id]; in i915_ddb_info()
2977 seq_printf(m, " Plane%-8d%8u%8u%8u\n", plane_id + 1, in i915_ddb_info()
/Linux-v5.4/drivers/gpu/drm/sti/
Dsti_mixer.c239 int plane_id, depth = plane->drm_plane.state->normalized_zpos; in sti_mixer_set_plane_depth() local
245 plane_id = GAM_DEPTH_GDP0_ID; in sti_mixer_set_plane_depth()
248 plane_id = GAM_DEPTH_GDP1_ID; in sti_mixer_set_plane_depth()
251 plane_id = GAM_DEPTH_GDP2_ID; in sti_mixer_set_plane_depth()
254 plane_id = GAM_DEPTH_GDP3_ID; in sti_mixer_set_plane_depth()
257 plane_id = GAM_DEPTH_VID0_ID; in sti_mixer_set_plane_depth()
271 if ((val & mask) == plane_id << (3 * i)) in sti_mixer_set_plane_depth()
276 plane_id = plane_id << (3 * depth); in sti_mixer_set_plane_depth()
281 plane_id, mask); in sti_mixer_set_plane_depth()
284 val |= plane_id; in sti_mixer_set_plane_depth()
/Linux-v5.4/drivers/gpu/drm/i915/gvt/
Ddmabuf.c209 int plane_id) in vgpu_get_plane_info() argument
217 if (plane_id == DRM_PLANE_TYPE_PRIMARY) { in vgpu_get_plane_info()
247 } else if (plane_id == DRM_PLANE_TYPE_CURSOR) { in vgpu_get_plane_info()
269 gvt_vgpu_err("invalid plane id:%d\n", plane_id); in vgpu_get_plane_info()
Dhandlers.c797 enum plane_id plane = REG_50080_TO_PLANE(offset); in reg50080_mmio_write()
/Linux-v5.4/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_trace.h643 TP_PROTO(uint32_t crtc_id, uint32_t plane_id,
647 TP_ARGS(crtc_id, plane_id, state, pstate, stage_idx, sspp,
651 __field( uint32_t, plane_id )
665 __entry->plane_id = plane_id;
681 __entry->crtc_id, __entry->plane_id, __entry->fb_id,
/Linux-v5.4/include/uapi/drm/
Ddrm_mode.h276 __u32 plane_id; member
295 __u32 plane_id; member
Di915_drm.h1465 __u32 plane_id; member
/Linux-v5.4/drivers/gpu/drm/
Ddrm_plane.c522 plane = drm_plane_find(dev, file_priv, plane_resp->plane_id); in drm_mode_getplane()
542 plane_resp->plane_id = plane->base.id; in drm_mode_getplane()
806 plane = drm_plane_find(dev, file_priv, plane_req->plane_id); in drm_mode_setplane()
809 plane_req->plane_id); in drm_mode_setplane()
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_hw_sequencer.c602 int plane_id) in power_on_plane() argument
608 hws->ctx->dc->hwss.dpp_pg_control(hws, plane_id, true); in power_on_plane()
609 hws->ctx->dc->hwss.hubp_pg_control(hws, plane_id, true); in power_on_plane()
613 "Un-gated front end for pipe %d\n", plane_id); in power_on_plane()
/Linux-v5.4/tools/include/uapi/drm/
Di915_drm.h1465 __u32 plane_id; member
/Linux-v5.4/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm.c2151 struct amdgpu_mode_info *mode_info, int plane_id, in initialize_plane() argument
2172 possible_crtcs = 1 << plane_id; in initialize_plane()
2173 if (plane_id >= dm->dc->caps.max_streams) in initialize_plane()
2185 mode_info->planes[plane_id] = plane; in initialize_plane()