| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
| D | display_rq_dlg_calc_21.c | 816 const unsigned int pipe_idx, in dml_rq_dlg_get_dlg_params() argument
824 const display_pipe_source_params_st *src = &e2e_pipe_param[pipe_idx].pipe.src; in dml_rq_dlg_get_dlg_params()
825 const display_pipe_dest_params_st *dst = &e2e_pipe_param[pipe_idx].pipe.dest; in dml_rq_dlg_get_dlg_params()
826 const display_output_params_st *dout = &e2e_pipe_param[pipe_idx].dout; in dml_rq_dlg_get_dlg_params()
827 const display_clocks_and_cfg_st *clks = &e2e_pipe_param[pipe_idx].clks_cfg; in dml_rq_dlg_get_dlg_params()
828 const scaler_ratio_depth_st *scl = &e2e_pipe_param[pipe_idx].pipe.scale_ratio_depth; in dml_rq_dlg_get_dlg_params()
829 const scaler_taps_st *taps = &e2e_pipe_param[pipe_idx].pipe.scale_taps; in dml_rq_dlg_get_dlg_params()
974 min_ttu_vblank = get_min_ttu_vblank(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); in dml_rq_dlg_get_dlg_params()
1056 double dsc_delay = get_dsc_delay(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); in dml_rq_dlg_get_dlg_params()
1105 dst_x_after_scaler = get_dst_x_after_scaler(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); in dml_rq_dlg_get_dlg_params()
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| D | display_rq_dlg_calc_21.h | 66 const unsigned int pipe_idx,
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| D | display_rq_dlg_calc_20.c | 49 const unsigned int pipe_idx,
769 const unsigned int pipe_idx, in dml20_rq_dlg_get_dlg_params() argument
777 const display_pipe_source_params_st *src = &e2e_pipe_param[pipe_idx].pipe.src; in dml20_rq_dlg_get_dlg_params()
778 const display_pipe_dest_params_st *dst = &e2e_pipe_param[pipe_idx].pipe.dest; in dml20_rq_dlg_get_dlg_params()
779 const display_output_params_st *dout = &e2e_pipe_param[pipe_idx].dout; in dml20_rq_dlg_get_dlg_params()
780 const display_clocks_and_cfg_st *clks = &e2e_pipe_param[pipe_idx].clks_cfg; in dml20_rq_dlg_get_dlg_params()
781 const scaler_ratio_depth_st *scl = &e2e_pipe_param[pipe_idx].pipe.scale_ratio_depth; in dml20_rq_dlg_get_dlg_params()
782 const scaler_taps_st *taps = &e2e_pipe_param[pipe_idx].pipe.scale_taps; in dml20_rq_dlg_get_dlg_params()
927 min_ttu_vblank = get_min_ttu_vblank(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); in dml20_rq_dlg_get_dlg_params()
1016 double dsc_delay = get_dsc_delay(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); in dml20_rq_dlg_get_dlg_params()
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| D | display_rq_dlg_calc_20v2.c | 49 const unsigned int pipe_idx,
769 const unsigned int pipe_idx, in dml20v2_rq_dlg_get_dlg_params() argument
777 const display_pipe_source_params_st *src = &e2e_pipe_param[pipe_idx].pipe.src; in dml20v2_rq_dlg_get_dlg_params()
778 const display_pipe_dest_params_st *dst = &e2e_pipe_param[pipe_idx].pipe.dest; in dml20v2_rq_dlg_get_dlg_params()
779 const display_output_params_st *dout = &e2e_pipe_param[pipe_idx].dout; in dml20v2_rq_dlg_get_dlg_params()
780 const display_clocks_and_cfg_st *clks = &e2e_pipe_param[pipe_idx].clks_cfg; in dml20v2_rq_dlg_get_dlg_params()
781 const scaler_ratio_depth_st *scl = &e2e_pipe_param[pipe_idx].pipe.scale_ratio_depth; in dml20v2_rq_dlg_get_dlg_params()
782 const scaler_taps_st *taps = &e2e_pipe_param[pipe_idx].pipe.scale_taps; in dml20v2_rq_dlg_get_dlg_params()
927 min_ttu_vblank = get_min_ttu_vblank(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); in dml20v2_rq_dlg_get_dlg_params()
1016 double dsc_delay = get_dsc_delay(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); in dml20v2_rq_dlg_get_dlg_params()
[all …]
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| D | display_rq_dlg_calc_20.h | 67 const unsigned int pipe_idx,
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| D | display_rq_dlg_calc_20v2.h | 67 const unsigned int pipe_idx,
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_resource.c | 1610 int pipe_idx = next_odm_pipe->pipe_idx; in dcn20_split_stream_for_odm() local
1614 next_odm_pipe->pipe_idx = pipe_idx; in dcn20_split_stream_for_odm()
1615 next_odm_pipe->plane_res.mi = pool->mis[next_odm_pipe->pipe_idx]; in dcn20_split_stream_for_odm()
1616 next_odm_pipe->plane_res.hubp = pool->hubps[next_odm_pipe->pipe_idx]; in dcn20_split_stream_for_odm()
1617 next_odm_pipe->plane_res.ipp = pool->ipps[next_odm_pipe->pipe_idx]; in dcn20_split_stream_for_odm()
1618 next_odm_pipe->plane_res.xfm = pool->transforms[next_odm_pipe->pipe_idx]; in dcn20_split_stream_for_odm()
1619 next_odm_pipe->plane_res.dpp = pool->dpps[next_odm_pipe->pipe_idx]; in dcn20_split_stream_for_odm()
1620 next_odm_pipe->plane_res.mpcc_inst = pool->dpps[next_odm_pipe->pipe_idx]->inst; in dcn20_split_stream_for_odm()
1669 next_odm_pipe->stream_res.opp = pool->opps[next_odm_pipe->pipe_idx]; in dcn20_split_stream_for_odm()
1688 int pipe_idx = secondary_pipe->pipe_idx; in dcn20_split_stream_for_mpc() local
[all …]
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| D | dcn20_hwseq.c | 521 pipe_ctx->pipe_idx); in dcn20_disable_plane()
1201 old_pipe_ctx->pipe_idx); in dcn20_apply_ctx_for_surface()
1671 pipe_ctx->pipe_idx, pipe_ctx->stream_res.tg->inst); in dcn20_reset_back_end_for_pipe()
2042 pipe_ctx->pipe_idx = i; in dcn20_fpga_init_hw()
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/core/ |
| D | dc_resource.c | 1105 int preferred_pipe_idx = (pool->pipe_count - 1) - primary_pipe->pipe_idx; in find_idle_secondary_pipe()
1108 secondary_pipe->pipe_idx = preferred_pipe_idx; in find_idle_secondary_pipe()
1120 secondary_pipe->pipe_idx = i; in find_idle_secondary_pipe()
1220 split_pipe->pipe_idx = i; in acquire_first_split_pipe()
1276 int pipe_idx = acquire_first_split_pipe(&context->res_ctx, pool, stream); in dc_add_plane_to_context() local
1277 if (pipe_idx >= 0) in dc_add_plane_to_context()
1278 free_pipe = &context->res_ctx.pipe_ctx[pipe_idx]; in dc_add_plane_to_context()
1625 pipe_ctx->pipe_idx = i; in acquire_first_free_pipe()
1896 pipe_ctx->pipe_idx = tg_inst; in acquire_resource_from_hw_enabled_state()
1914 int pipe_idx = -1; in resource_map_pool_resources() local
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| D | dc_debug.c | 325 if (pipe_ctx->stream == NULL || pipe_ctx->pipe_idx == underlay_idx) in context_timing_trace()
335 if (pipe_ctx->stream == NULL || pipe_ctx->pipe_idx == underlay_idx) in context_timing_trace()
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| D | dc.c | 1196 context->res_ctx.pipe_ctx[i].pipe_idx = i; in dc_post_update_surfaces_to_stream()
1239 cur_pipe->top_pipe = &new_ctx->res_ctx.pipe_ctx[cur_pipe->top_pipe->pipe_idx]; in dc_copy_state()
1242 cur_pipe->bottom_pipe = &new_ctx->res_ctx.pipe_ctx[cur_pipe->bottom_pipe->pipe_idx]; in dc_copy_state()
1245 cur_pipe->prev_odm_pipe = &new_ctx->res_ctx.pipe_ctx[cur_pipe->prev_odm_pipe->pipe_idx]; in dc_copy_state()
1248 cur_pipe->next_odm_pipe = &new_ctx->res_ctx.pipe_ctx[cur_pipe->next_odm_pipe->pipe_idx]; in dc_copy_state()
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| D | dc_link.c | 2544 pipe_ctx->pipe_idx); in allocate_mst_payload()
2632 pipe_ctx->pipe_idx); in deallocate_mst_payload()
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/dml/ |
| D | display_mode_lib.h | 55 const unsigned int pipe_idx,
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/ |
| D | dce110_clk_mgr.c | 148 cfg->pipe_idx = pipe_ctx->stream_res.tg->inst; in dce110_fill_display_configs()
240 pp_display_cfg->disp_configs[0].pipe_idx; in dce11_pplib_apply_display_requirements()
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/dcn21/ |
| D | dcn21_resource.c | 984 int pipe_cnt, i, pipe_idx; in dcn21_calculate_wm() local
991 for (i = 0, pipe_idx = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) { in dcn21_calculate_wm()
1000 … context->bw_ctx.dml.vba.RequiredDPPCLK[vlevel_req][context->bw_ctx.dml.vba.maxMpcComb][pipe_idx]; in dcn21_calculate_wm()
1001 if (context->bw_ctx.dml.vba.BlendingAndTiming[pipe_idx] == pipe_idx) in dcn21_calculate_wm()
1003 context->bw_ctx.dml.vba.ODMCombineEnablePerState[vlevel_req][pipe_idx]; in dcn21_calculate_wm()
1006 pipe_idx++; in dcn21_calculate_wm()
1019 if (pipe_cnt != pipe_idx) { in dcn21_calculate_wm()
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/dce110/ |
| D | dce110_hw_sequencer.c | 1276 pipe_ctx[pipe_ctx->pipe_idx]; in dce110_enable_stream_timing()
1514 dc->current_state->res_ctx.pipe_ctx[i].pipe_idx = i; in disable_vga_and_power_gate_all_controllers()
1792 uint32_t *pipe_idx) in should_enable_fbc() argument
1819 if (pipe_ctx->pipe_idx != underlay_idx) { in should_enable_fbc()
1820 *pipe_idx = i; in should_enable_fbc()
1858 uint32_t pipe_idx = 0; in enable_fbc() local
1860 if (should_enable_fbc(dc, context, &pipe_idx)) { in enable_fbc()
1864 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[pipe_idx]; in enable_fbc()
2476 old_pipe = &dc->current_state->res_ctx.pipe_ctx[pipe_ctx->pipe_idx]; in dce110_program_front_end_for_pipe()
2544 pipe_ctx->pipe_idx, in dce110_program_front_end_for_pipe()
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| D | dce110_resource.c | 858 if (pipe_ctx->pipe_idx != underlay_idx) in is_surface_pixel_format_supported()
1066 pipe_ctx->pipe_idx = underlay_idx; in dce110_acquire_underlay()
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/calcs/ |
| D | dcn_calcs.c | 515 int pipe_idx = secondary_pipe->pipe_idx; in split_stream_across_pipes() local
522 secondary_pipe->pipe_idx = pipe_idx; in split_stream_across_pipes()
523 secondary_pipe->plane_res.mi = pool->mis[secondary_pipe->pipe_idx]; in split_stream_across_pipes()
524 secondary_pipe->plane_res.hubp = pool->hubps[secondary_pipe->pipe_idx]; in split_stream_across_pipes()
525 secondary_pipe->plane_res.ipp = pool->ipps[secondary_pipe->pipe_idx]; in split_stream_across_pipes()
526 secondary_pipe->plane_res.xfm = pool->transforms[secondary_pipe->pipe_idx]; in split_stream_across_pipes()
527 secondary_pipe->plane_res.dpp = pool->dpps[secondary_pipe->pipe_idx]; in split_stream_across_pipes()
528 secondary_pipe->plane_res.mpcc_inst = pool->dpps[secondary_pipe->pipe_idx]->inst; in split_stream_across_pipes()
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/ |
| D | dm_services_types.h | 126 uint8_t pipe_idx; member
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_resource.c | 1110 idle_pipe->plane_res.hubp = pool->hubps[idle_pipe->pipe_idx]; in dcn10_acquire_idle_pipe_for_layer()
1111 idle_pipe->plane_res.ipp = pool->ipps[idle_pipe->pipe_idx]; in dcn10_acquire_idle_pipe_for_layer()
1112 idle_pipe->plane_res.dpp = pool->dpps[idle_pipe->pipe_idx]; in dcn10_acquire_idle_pipe_for_layer()
1113 idle_pipe->plane_res.mpcc_inst = pool->dpps[idle_pipe->pipe_idx]->inst; in dcn10_acquire_idle_pipe_for_layer()
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| D | dcn10_hw_sequencer.c | 872 pipe_ctx->pipe_idx, pipe_ctx->stream_res.tg->inst); in dcn10_reset_back_end_for_pipe()
1073 pipe_ctx->pipe_idx); in dcn10_disable_plane()
1147 pipe_ctx->pipe_idx = i; in dcn10_init_pipes()
2621 old_pipe_ctx->pipe_idx); in dcn10_apply_ctx_for_surface()
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/inc/ |
| D | core_types.h | 299 uint8_t pipe_idx; member
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_clk_mgr.c | 520 cfg->pipe_idx = pipe_ctx->stream_res.tg->inst; in dce110_fill_display_configs()
660 pp_display_cfg->disp_configs[0].pipe_idx; in dce11_pplib_apply_display_requirements()
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| /Linux-v5.4/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| D | amdgpu_dm_pp_smu.c | 102 adev->pm.pm_display_cfg.displays[i].controller_id = dc_cfg->pipe_idx + 1; in dm_pp_apply_display_requirements()
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