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Searched refs:pipe_dlg_param (Results 1 – 5 of 5) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/display/dc/calcs/
Ddcn_calcs.c434 input->dest.vstartup_start = pipe->pipe_dlg_param.vstartup_start; in pipe_ctx_to_e2e_pipe_params()
435 input->dest.vupdate_offset = pipe->pipe_dlg_param.vupdate_offset; in pipe_ctx_to_e2e_pipe_params()
436 input->dest.vupdate_offset = pipe->pipe_dlg_param.vupdate_offset; in pipe_ctx_to_e2e_pipe_params()
437 input->dest.vupdate_width = pipe->pipe_dlg_param.vupdate_width; in pipe_ctx_to_e2e_pipe_params()
1181 pipe->pipe_dlg_param.vupdate_width = v->v_update_width_pix[input_idx]; in dcn_validate_bandwidth()
1182 pipe->pipe_dlg_param.vupdate_offset = v->v_update_offset_pix[input_idx]; in dcn_validate_bandwidth()
1183 pipe->pipe_dlg_param.vready_offset = v->v_ready_offset_pix[input_idx]; in dcn_validate_bandwidth()
1184 pipe->pipe_dlg_param.vstartup_start = v->v_startup[input_idx]; in dcn_validate_bandwidth()
1186 pipe->pipe_dlg_param.htotal = pipe->stream->timing.h_total; in dcn_validate_bandwidth()
1187 pipe->pipe_dlg_param.vtotal = pipe->stream->timing.v_total; in dcn_validate_bandwidth()
[all …]
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_hwseq.c572 pipe_ctx->pipe_dlg_param.vready_offset, in dcn20_enable_stream_timing()
573 pipe_ctx->pipe_dlg_param.vstartup_start, in dcn20_enable_stream_timing()
574 pipe_ctx->pipe_dlg_param.vupdate_offset, in dcn20_enable_stream_timing()
575 pipe_ctx->pipe_dlg_param.vupdate_width, in dcn20_enable_stream_timing()
1042 pipe_ctx->pipe_dlg_param.vready_offset, in dcn20_program_all_pipe_in_tree()
1043 pipe_ctx->pipe_dlg_param.vstartup_start, in dcn20_program_all_pipe_in_tree()
1044 pipe_ctx->pipe_dlg_param.vupdate_offset, in dcn20_program_all_pipe_in_tree()
1045 pipe_ctx->pipe_dlg_param.vupdate_width); in dcn20_program_all_pipe_in_tree()
1315 pipe_ctx->pipe_dlg_param.vready_offset, in dcn20_update_bandwidth()
1316 pipe_ctx->pipe_dlg_param.vstartup_start, in dcn20_update_bandwidth()
[all …]
Ddcn20_resource.c2687 context->res_ctx.pipe_ctx[i].pipe_dlg_param = pipes[pipe_idx].pipe.dest; in dcn20_calculate_dlg_params()
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_hw_sequencer.c765 pipe_ctx->pipe_dlg_param.vready_offset, in dcn10_enable_stream_timing()
766 pipe_ctx->pipe_dlg_param.vstartup_start, in dcn10_enable_stream_timing()
767 pipe_ctx->pipe_dlg_param.vupdate_offset, in dcn10_enable_stream_timing()
768 pipe_ctx->pipe_dlg_param.vupdate_width, in dcn10_enable_stream_timing()
2327 &pipe_ctx->pipe_dlg_param); in update_dchubp_dpp()
2507 pipe_ctx->pipe_dlg_param.vready_offset, in program_all_pipe_in_tree()
2508 pipe_ctx->pipe_dlg_param.vstartup_start, in program_all_pipe_in_tree()
2509 pipe_ctx->pipe_dlg_param.vupdate_offset, in program_all_pipe_in_tree()
2510 pipe_ctx->pipe_dlg_param.vupdate_width); in program_all_pipe_in_tree()
3099 pipe_ctx->pipe_dlg_param.vstartup_start + 1; in get_vupdate_offset_from_vsync()
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/inc/
Dcore_types.h310 struct _vcs_dpi_display_pipe_dest_params_st pipe_dlg_param; member