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Searched refs:phy_read_mmd (Results 1 – 17 of 17) sorted by relevance

/Linux-v5.4/drivers/net/phy/
Dphy-c45.c23 ctrl1 = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1); in genphy_c45_pma_setup_forced()
27 ctrl2 = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL2); in genphy_c45_pma_setup_forced()
174 ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1); in genphy_c45_check_and_restart_aneg()
202 int val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); in genphy_c45_aneg_done()
223 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1); in genphy_c45_read_link()
245 val = phy_read_mmd(phydev, devad, MDIO_STAT1); in genphy_c45_read_link()
252 val = phy_read_mmd(phydev, devad, MDIO_STAT1); in genphy_c45_read_link()
280 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); in genphy_c45_read_lpa()
299 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_LPA); in genphy_c45_read_lpa()
308 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_10GBT_STAT); in genphy_c45_read_lpa()
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Dteranetics.c39 if (!phy_read_mmd(phydev, MDIO_MMD_VEND1, 93)) in teranetics_aneg_done()
54 if (!phy_read_mmd(phydev, MDIO_MMD_VEND1, 93)) { in teranetics_read_status()
55 reg = phy_read_mmd(phydev, MDIO_MMD_PHYXS, MDIO_PHYXS_LNSTAT); in teranetics_read_status()
62 reg = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); in teranetics_read_status()
Daquantia_main.c171 val = phy_read_mmd(phydev, MDIO_MMD_C22EXT, stat->reg); in aqr107_get_stat()
177 val = phy_read_mmd(phydev, MDIO_MMD_C22EXT, stat->reg + 1); in aqr107_get_stat()
268 reg = phy_read_mmd(phydev, MDIO_MMD_AN, in aqr_ack_interrupt()
278 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_RX_LP_STAT1); in aqr_read_status()
297 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_TX_VEND_INT_STATUS1); in aqr107_read_downshift_event()
308 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_TX_VEND_STATUS1); in aqr107_read_rate()
355 val = phy_read_mmd(phydev, MDIO_MMD_PHYXS, MDIO_PHYXS_VEND_IF_STATUS); in aqr107_read_status()
392 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_VEND_PROV); in aqr107_get_downshift()
455 val = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_FW_ID); in aqr107_wait_reset_complete()
469 val = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_FW_ID); in aqr107_chip_info()
[all …]
Ddp83822.c114 value = phy_read_mmd(phydev, DP83822_DEVADDR, in dp83822_set_wol()
141 value = phy_read_mmd(phydev, DP83822_DEVADDR, in dp83822_set_wol()
160 value = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG); in dp83822_get_wol()
166 sopass_val = phy_read_mmd(phydev, DP83822_DEVADDR, in dp83822_get_wol()
171 sopass_val = phy_read_mmd(phydev, DP83822_DEVADDR, in dp83822_get_wol()
176 sopass_val = phy_read_mmd(phydev, DP83822_DEVADDR, in dp83822_get_wol()
282 value = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG); in dp83822_suspend()
296 value = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG); in dp83822_resume()
Dmarvell10g.c93 temp = phy_read_mmd(phydev, MDIO_MMD_VEND2, MV_V2_TEMP); in mv3310_hwmon_read()
219 ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MV_PMA_BOOT); in mv3310_probe()
299 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, in mv3310_get_features()
352 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_BASE_R + MDIO_STAT1); in mv3310_aneg_done()
415 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_BASE_R + MDIO_STAT1); in mv3310_read_status()
426 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); in mv3310_read_status()
436 val = phy_read_mmd(phydev, MDIO_MMD_AN, MV_AN_STAT1000); in mv3310_read_status()
457 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_PAIRSWAP); in mv3310_read_status()
Ddp83tc811.c120 value = phy_read_mmd(phydev, DP83811_DEVADDR, in dp83811_set_wol()
163 value = phy_read_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG); in dp83811_get_wol()
169 sopass_val = phy_read_mmd(phydev, DP83811_DEVADDR, in dp83811_get_wol()
174 sopass_val = phy_read_mmd(phydev, DP83811_DEVADDR, in dp83811_get_wol()
179 sopass_val = phy_read_mmd(phydev, DP83811_DEVADDR, in dp83811_get_wol()
314 value = phy_read_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG); in dp83811_suspend()
Dphy.c1028 eee_cap = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE); in phy_init_eee()
1039 eee_lp = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE); in phy_init_eee()
1043 eee_adv = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV); in phy_init_eee()
1080 return phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_EEE_WK_ERR); in phy_get_eee_err()
1100 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE); in phy_ethtool_get_eee()
1106 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV); in phy_ethtool_get_eee()
1113 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE); in phy_ethtool_get_eee()
1139 cap = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE); in phy_ethtool_set_eee()
1143 old_adv = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV); in phy_ethtool_set_eee()
Ddp83867.c212 const u16 val = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_STRAP_STS2); in dp83867_of_init()
333 bs = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_STRAP_STS1); in dp83867_config_init()
348 val = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIICTL); in dp83867_config_init()
401 val = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_SGMIICTL); in dp83867_config_init()
Dmicrochip.c250 priv->chip_id = phy_read_mmd(phydev, 3, LAN88XX_MMD3_CHIP_ID); in lan88xx_probe()
251 priv->chip_rev = phy_read_mmd(phydev, 3, LAN88XX_MMD3_CHIP_REV); in lan88xx_probe()
309 val = phy_read_mmd(phydev, MDIO_MMD_PCS, in lan88xx_config_init()
Dadin.c228 reg = phy_read_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_GE_RGMII_CFG_REG); in adin_config_rgmii_mode()
274 reg = phy_read_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_GE_RMII_CFG_REG); in adin_config_rmii_mode()
631 rc = phy_read_mmd(phydev, MDIO_MMD_VEND1, in adin_soft_reset()
658 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, stat->reg1); in adin_read_mmd_stat_regs()
667 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, stat->reg2); in adin_read_mmd_stat_regs()
Daquantia_hwmon.c58 int temp = phy_read_mmd(phydev, MDIO_MMD_VEND1, reg); in aqr_hwmon_get()
84 int val = phy_read_mmd(phydev, MDIO_MMD_VEND1, reg); in aqr_hwmon_test_bit()
Dbcm-phy-lib.c196 val = phy_read_mmd(phydev, MDIO_MMD_AN, BRCM_CL45VEN_EEE_CONTROL); in bcm_phy_set_eee()
208 val = phy_read_mmd(phydev, MDIO_MMD_AN, BCM_CL45VEN_EEE_ADV); in bcm_phy_set_eee()
Dmicrel.c520 newval = phy_read_mmd(phydev, 2, reg); in ksz9031_of_load_skew_values()
560 reg = phy_read_mmd(phydev, 0x1C, MII_KSZ9031RN_EDPD); in ksz9031_enable_edpd()
690 newval = phy_read_mmd(phydev, 2, reg); in ksz9131_of_load_skew_values()
Dphy-core.c410 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum) in phy_read_mmd() function
420 EXPORT_SYMBOL(phy_read_mmd);
/Linux-v5.4/include/linux/
Dphy.h748 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
/Linux-v5.4/drivers/net/usb/
Dlan78xx.c2008 buf = phy_read_mmd(phydev, MDIO_MMD_PCS, 0x8010); in lan8835_fixup()
/Linux-v5.4/drivers/net/ethernet/realtek/
Dr8169_main.c2107 int supported = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE); in rtl_enable_eee()