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Searched refs:phy_read (Results 1 – 25 of 87) sorted by relevance

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/Linux-v5.4/drivers/net/ethernet/ibm/emac/
Dphy.c32 #define phy_read _phy_read macro
60 val = phy_read(phy, MII_BMCR); in emac_mii_reset_phy()
68 val = phy_read(phy, MII_BMCR); in emac_mii_reset_phy()
120 ctl = phy_read(phy, MII_BMCR); in genmii_setup_aneg()
129 adv = phy_read(phy, MII_ADVERTISE); in genmii_setup_aneg()
150 adv = phy_read(phy, MII_CTRL1000); in genmii_setup_aneg()
162 ctl = phy_read(phy, MII_BMCR); in genmii_setup_aneg()
178 ctl = phy_read(phy, MII_BMCR); in genmii_setup_forced()
211 phy_read(phy, MII_BMSR); in genmii_poll_link()
212 status = phy_read(phy, MII_BMSR); in genmii_poll_link()
[all …]
/Linux-v5.4/drivers/net/phy/
Dlxt.c63 err = phy_read(phydev, MII_BMSR); in lxt970_ack_interrupt()
68 err = phy_read(phydev, MII_LXT970_ISR); in lxt970_ack_interrupt()
92 int err = phy_read(phydev, MII_LXT971_ISR); in lxt971_ack_interrupt()
120 status = phy_read(phydev, MII_BMSR); in lxt973a2_update_link()
125 control = phy_read(phydev, MII_BMCR); in lxt973a2_update_link()
131 status = phy_read(phydev, MII_BMSR); in lxt973a2_update_link()
159 adv = phy_read(phydev, MII_ADVERTISE); in lxt973a2_read_status()
165 lpa = phy_read(phydev, MII_LPA); in lxt973a2_read_status()
198 int bmcr = phy_read(phydev, MII_BMCR); in lxt973a2_read_status()
224 int val = phy_read(phydev, MII_LXT973_PCR); in lxt973_probe()
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Dat803x.c95 return phy_read(phydev, AT803X_DEBUG_DATA); in at803x_debug_reg_read()
143 context->bmcr = phy_read(phydev, MII_BMCR); in at803x_context_save()
144 context->advertise = phy_read(phydev, MII_ADVERTISE); in at803x_context_save()
145 context->control1000 = phy_read(phydev, MII_CTRL1000); in at803x_context_save()
146 context->int_enable = phy_read(phydev, AT803X_INTR_ENABLE); in at803x_context_save()
147 context->smart_speed = phy_read(phydev, AT803X_SMART_SPEED); in at803x_context_save()
148 context->led_control = phy_read(phydev, AT803X_LED_CONTROL); in at803x_context_save()
189 value = phy_read(phydev, AT803X_INTR_ENABLE); in at803x_set_wol()
194 value = phy_read(phydev, AT803X_INTR_STATUS); in at803x_set_wol()
196 value = phy_read(phydev, AT803X_INTR_ENABLE); in at803x_set_wol()
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Dbcm87xx.c61 val = phy_read(phydev, regnum); in bcm87xx_of_reg_init()
107 rx_signal_detect = phy_read(phydev, BCM87XX_PMD_RX_SIGNAL_DETECT); in bcm87xx_read_status()
114 pcs_status = phy_read(phydev, BCM87XX_10GBASER_PCS_STATUS); in bcm87xx_read_status()
121 xgxs_lane_status = phy_read(phydev, BCM87XX_XGXS_LANE_STATUS); in bcm87xx_read_status()
142 reg = phy_read(phydev, BCM87XX_LASI_CONTROL); in bcm87xx_config_intr()
160 reg = phy_read(phydev, BCM87XX_LASI_STATUS); in bcm87xx_did_interrupt()
Dste10Xp.c35 value = phy_read(phydev, MII_BMCR); in ste10Xp_config_init()
45 value = phy_read(phydev, MII_BMCR); in ste10Xp_config_init()
60 value = phy_read(phydev, MII_XCIIS); in ste10Xp_config_intr()
72 int err = phy_read(phydev, MII_XCIIS); in ste10Xp_ack_interrupt()
Dicplus.c124 bmcr = phy_read(phydev, MII_BMCR); in ip1xx_reset()
133 bmcr = phy_read(phydev, MII_BMCR); in ip1xx_reset()
150 c = phy_read(phydev, IP1001_SPEC_CTRL_STATUS_2); in ip1001_config_init()
160 c = phy_read(phydev, IP10XX_SPEC_CTRL_STATUS); in ip1001_config_init()
269 c = phy_read(phydev, IP10XX_SPEC_CTRL_STATUS); in ip101a_g_config_init()
290 int val = phy_read(phydev, IP101A_G_IRQ_CONF_STATUS); in ip101a_g_did_interrupt()
302 int err = phy_read(phydev, IP101A_G_IRQ_CONF_STATUS); in ip101a_g_ack_interrupt()
Dsmsc.c50 int rc = phy_read (phydev, MII_LAN83C185_ISF); in smsc_phy_ack_interrupt()
59 int rc = phy_read(phydev, MII_LAN83C185_CTRL_STATUS); in smsc_phy_config_init()
77 int rc = phy_read(phydev, MII_LAN83C185_SPECIAL_MODES); in smsc_phy_reset()
118 int rc = phy_read(phydev, MII_LAN83C185_CTRL_STATUS); in lan87xx_read_status()
131 rc = phy_read(phydev, MII_LAN83C185_CTRL_STATUS); in lan87xx_read_status()
139 rc = phy_read(phydev, MII_LAN83C185_CTRL_STATUS); in lan87xx_read_status()
173 val = phy_read(phydev, stat.reg); in smsc_get_stat()
Ddp83tc811.c82 err = phy_read(phydev, MII_DP83811_INT_STAT1); in dp83811_ack_interrupt()
86 err = phy_read(phydev, MII_DP83811_INT_STAT2); in dp83811_ack_interrupt()
90 err = phy_read(phydev, MII_DP83811_INT_STAT3); in dp83811_ack_interrupt()
197 misr_status = phy_read(phydev, MII_DP83811_INT_STAT1); in dp83811_config_intr()
214 misr_status = phy_read(phydev, MII_DP83811_INT_STAT2); in dp83811_config_intr()
229 misr_status = phy_read(phydev, MII_DP83811_INT_STAT3); in dp83811_config_intr()
259 value = phy_read(phydev, MII_DP83811_SGMII_CTRL); in dp83811_config_aneg()
280 value = phy_read(phydev, MII_DP83811_SGMII_CTRL); in dp83811_config_init()
Dbcm-phy-lib.c37 val = phy_read(phydev, MII_BCM54XX_EXP_DATA); in bcm_phy_read_exp()
53 return phy_read(phydev, MII_BCM54XX_AUX_CTL); in bcm54xx_auxctl_read()
74 tmp = phy_read(phydev, MII_BCM54XX_AUX_CTL); in bcm_phy_write_misc()
98 tmp = phy_read(phydev, MII_BCM54XX_AUX_CTL); in bcm_phy_read_misc()
116 reg = phy_read(phydev, MII_BCM54XX_ISR); in bcm_phy_ack_intr()
128 reg = phy_read(phydev, MII_BCM54XX_ECR); in bcm_phy_config_intr()
144 return MII_BCM54XX_SHD_DATA(phy_read(phydev, MII_BCM54XX_SHD)); in bcm_phy_read_shadow()
351 val = phy_read(phydev, stat.reg); in bcm_phy_get_stat()
Dqsemi.c78 err = phy_read(phydev, MII_QS6612_ISR); in qs6612_ack_interrupt()
83 err = phy_read(phydev, MII_BMSR); in qs6612_ack_interrupt()
88 err = phy_read(phydev, MII_EXPANSION); in qs6612_ack_interrupt()
Det1011c.c50 ctl = phy_read(phydev, MII_BMCR); in et1011c_config_aneg()
70 val = phy_read(phydev, ET1011C_STATUS_REG); in et1011c_read_status()
73 val = phy_read(phydev, ET1011C_CONFIG_REG); in et1011c_read_status()
DuPD60620.c40 phy_state = phy_read(phydev, MII_BMSR); in upd60620_read_status()
50 phy_state = phy_read(phydev, PHY_PHYSCR); in upd60620_read_status()
64 phy_state = phy_read(phydev, MII_LPA); in upd60620_read_status()
Dnxp-tja11xx.c78 ret = phy_read(phydev, reg); in tja11xx_check()
117 ret = phy_read(phydev, MII_ECTRL); in tja11xx_wakeup()
215 ret = phy_read(phydev, MII_INTSRC); in tja11xx_config_init()
231 ret = phy_read(phydev, MII_COMMSTAT); in tja11xx_read_status()
263 ret = phy_read(phydev, tja11xx_hw_stats[i].reg); in tja11xx_get_stats()
281 ret = phy_read(phydev, MII_INTSRC); in tja11xx_hwmon_read()
290 ret = phy_read(phydev, MII_INTSRC); in tja11xx_hwmon_read()
Ddp83822.c80 err = phy_read(phydev, MII_DP83822_MISR1); in dp83822_ack_interrupt()
84 err = phy_read(phydev, MII_DP83822_MISR2); in dp83822_ack_interrupt()
196 misr_status = phy_read(phydev, MII_DP83822_MISR1); in dp83822_config_intr()
213 misr_status = phy_read(phydev, MII_DP83822_MISR2); in dp83822_config_intr()
230 physcr_status = phy_read(phydev, MII_DP83822_PHYSCR); in dp83822_config_intr()
245 physcr_status = phy_read(phydev, MII_DP83822_PHYSCR); in dp83822_config_intr()
Ddp83848.c42 int err = phy_read(phydev, DP83848_MISR); in dp83848_ack_interrupt()
51 control = phy_read(phydev, DP83848_MICR); in dp83848_config_intr()
76 val = phy_read(phydev, MII_BMCR); in dp83848_config_init()
Dmeson-gxl.c88 ret = phy_read(phydev, TSTREAD1); in meson_gxl_read_reg()
174 lpa = phy_read(phydev, MII_LPA); in meson_gxl_read_status()
178 exp = phy_read(phydev, MII_EXPANSION); in meson_gxl_read_status()
196 int ret = phy_read(phydev, INTSRC_FLAG); in meson_gxl_ack_interrupt()
Dnational.c57 return phy_read(phydev, NS_EXP_MEM_DATA); in ns_exp_read()
81 int ret = phy_read(phydev, DP83865_INT_STATUS); in ns_ack_interrupt()
94 int bmcr = phy_read(phydev, MII_BMCR); in ns_giga_speed_fallback()
Dadin.c295 val = phy_read(phydev, ADIN1300_PHY_CTRL2); in adin_get_downshift()
299 cnt = phy_read(phydev, ADIN1300_PHY_CTRL3); in adin_get_downshift()
340 val = phy_read(phydev, ADIN1300_PHY_CTRL_STATUS2); in adin_get_edpd()
441 int rc = phy_read(phydev, ADIN1300_INT_STATUS_REG); in adin_phy_ack_intr()
537 reg = phy_read(phydev, ADIN1300_PHY_CTRL1); in adin_config_mdix()
571 reg = phy_read(phydev, ADIN1300_PHY_CTRL1); in adin_mdix_update()
592 reg = phy_read(phydev, ADIN1300_PHY_STATUS1); in adin_mdix_update()
689 ret = phy_read(phydev, stat->reg1); in adin_get_stat()
706 rc = phy_read(phydev, ADIN1300_RX_ERR_CNT); in adin_get_stats()
Dmicrel.c143 return phy_read(phydev, MII_KSZPHY_EXTREG_READ); in kszphy_extended_read()
151 rc = phy_read(phydev, MII_KSZPHY_INTCS); in kszphy_ack_interrupt()
168 temp = phy_read(phydev, MII_KSZPHY_CTRL); in kszphy_config_intr()
187 ctrl = phy_read(phydev, MII_KSZPHY_CTRL); in kszphy_rmii_clk_sel()
214 temp = phy_read(phydev, reg); in kszphy_setup_led()
237 ret = phy_read(phydev, MII_KSZPHY_OMSO); in kszphy_broadcast_disable()
253 ret = phy_read(phydev, MII_KSZPHY_OMSO); in kszphy_nand_tree_disable()
352 ret = phy_read(phydev, MII_BMSR); in ksz8051_ksz8795_match_phy_device()
631 result = phy_read(phydev, MII_CTRL1000); in ksz9031_config_init()
768 regval = phy_read(phydev, KSZ8873MLL_GLOBAL_CONTROL_4); in ksz8873mll_read_status()
[all …]
Damd.c31 err = phy_read(phydev, MII_BMSR); in am79c_ack_interrupt()
35 err = phy_read(phydev, MII_AM79C_IR); in am79c_ack_interrupt()
Dmicrochip_t1.c27 rc = phy_read(phydev, LAN87XX_INTERRUPT_SOURCE); in lan87xx_phy_config_intr()
38 int rc = phy_read(phydev, LAN87XX_INTERRUPT_SOURCE); in lan87xx_phy_ack_interrupt()
Dbroadcom.c43 val = phy_read(phydev, MII_CTRL1000); in bcm54210e_config_init()
276 reg = phy_read(phydev, MII_BCM54XX_ECR); in bcm54xx_config_init()
471 val = phy_read(phydev, reg); in brcm_phy_setbits()
487 reg = phy_read(phydev, MII_BRCM_FET_INTREG); in brcm_fet_config_init()
503 brcmtest = phy_read(phydev, MII_BRCM_FET_BRCMTEST); in brcm_fet_config_init()
514 reg = phy_read(phydev, MII_BRCM_FET_SHDW_AUXMODE4); in brcm_fet_config_init()
553 reg = phy_read(phydev, MII_BRCM_FET_INTREG); in brcm_fet_ack_interrupt()
564 reg = phy_read(phydev, MII_BRCM_FET_INTREG); in brcm_fet_config_intr()
/Linux-v5.4/drivers/staging/mt7621-pci-phy/
Dpci-mt7621-phy.c109 static inline u32 phy_read(struct mt7621_pci_phy *phy, u32 reg) in phy_read() function
130 reg = phy_read(phy, offset); in mt7621_bypass_pipe_rst()
147 val = phy_read(phy, RG_PE1_FRC_H_XTAL_REG); in mt7621_set_phy_for_ssc()
156 val = phy_read(phy, offset); in mt7621_set_phy_for_ssc()
162 val = phy_read(phy, RG_PE1_H_PLL_REG); in mt7621_set_phy_for_ssc()
176 val = phy_read(phy, RG_PE1_H_PLL_FBKSEL_REG); in mt7621_set_phy_for_ssc()
182 val = phy_read(phy, RG_PE1_H_LCDDS_SSC_PRD_REG); in mt7621_set_phy_for_ssc()
188 val = phy_read(phy, RG_PE1_H_LCDDS_SSC_PRD_REG); in mt7621_set_phy_for_ssc()
194 val = phy_read(phy, RG_PE1_H_LCDDS_SSC_DELTA_REG); in mt7621_set_phy_for_ssc()
206 val = phy_read(phy, RG_PE1_LCDDS_CLK_PH_INV_REG); in mt7621_set_phy_for_ssc()
[all …]
/Linux-v5.4/arch/powerpc/platforms/85xx/
Dmpc85xx_mds.c72 scr = phy_read(phydev, MV88E1111_SCR); in mpc8568_fixup_125_clock()
87 scr = phy_read(phydev, MV88E1111_SCR); in mpc8568_fixup_125_clock()
108 temp = phy_read(phydev, 30); in mpc8568_mds_phy_fixups()
124 temp = phy_read(phydev, 30); in mpc8568_mds_phy_fixups()
129 temp = phy_read(phydev, 30); in mpc8568_mds_phy_fixups()
142 temp = phy_read(phydev, 16); in mpc8568_mds_phy_fixups()
/Linux-v5.4/arch/arm/mach-imx/
Dmach-imx6q.c114 val = phy_read(dev, 0xe); in ar8031_phy_fixup()
121 val = phy_read(dev, 0x1e); in ar8031_phy_fixup()
141 val = phy_read(dev, 0xe); in ar8035_phy_fixup()
154 val = phy_read(dev, 0x0); in ar8035_phy_fixup()

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