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Searched refs:phase (Results 1 – 25 of 315) sorted by relevance

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/Linux-v5.4/drivers/clk/hisilicon/
Dclk-hisi-phase.c30 static int hisi_phase_regval_to_degrees(struct clk_hisi_phase *phase, in hisi_phase_regval_to_degrees() argument
35 for (i = 0; i < phase->phase_num; i++) in hisi_phase_regval_to_degrees()
36 if (phase->phase_regvals[i] == regval) in hisi_phase_regval_to_degrees()
37 return phase->phase_degrees[i]; in hisi_phase_regval_to_degrees()
44 struct clk_hisi_phase *phase = to_clk_hisi_phase(hw); in hisi_clk_get_phase() local
47 regval = readl(phase->reg); in hisi_clk_get_phase()
48 regval = (regval & phase->mask) >> phase->shift; in hisi_clk_get_phase()
50 return hisi_phase_regval_to_degrees(phase, regval); in hisi_clk_get_phase()
53 static int hisi_phase_degrees_to_regval(struct clk_hisi_phase *phase, in hisi_phase_degrees_to_regval() argument
58 for (i = 0; i < phase->phase_num; i++) in hisi_phase_degrees_to_regval()
[all …]
/Linux-v5.4/drivers/clk/sunxi-ng/
Dccu_phase.c15 struct ccu_phase *phase = hw_to_ccu_phase(hw); in ccu_phase_get_phase() local
22 reg = readl(phase->common.base + phase->common.reg); in ccu_phase_get_phase()
23 delay = (reg >> phase->shift); in ccu_phase_get_phase()
24 delay &= (1 << phase->width) - 1; in ccu_phase_get_phase()
58 struct ccu_phase *phase = hw_to_ccu_phase(hw); in ccu_phase_set_phase() local
110 spin_lock_irqsave(phase->common.lock, flags); in ccu_phase_set_phase()
111 reg = readl(phase->common.base + phase->common.reg); in ccu_phase_set_phase()
112 reg &= ~GENMASK(phase->width + phase->shift - 1, phase->shift); in ccu_phase_set_phase()
113 writel(reg | (delay << phase->shift), in ccu_phase_set_phase()
114 phase->common.base + phase->common.reg); in ccu_phase_set_phase()
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/Linux-v5.4/drivers/clk/sunxi/
Dclk-mod0.c175 struct mmc_phase *phase = to_mmc_phase(hw); in mmc_get_phase() local
181 value = readl(phase->reg); in mmc_get_phase()
182 delay = (value >> phase->offset) & 0x3; in mmc_get_phase()
217 struct mmc_phase *phase = to_mmc_phase(hw); in mmc_set_phase() local
268 spin_lock_irqsave(phase->lock, flags); in mmc_set_phase()
269 value = readl(phase->reg); in mmc_set_phase()
270 value &= ~GENMASK(phase->offset + 3, phase->offset); in mmc_set_phase()
271 value |= delay << phase->offset; in mmc_set_phase()
272 writel(value, phase->reg); in mmc_set_phase()
273 spin_unlock_irqrestore(phase->lock, flags); in mmc_set_phase()
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/Linux-v5.4/drivers/mmc/host/
Dsdhci-sirf.c77 int phase; in sdhci_sirf_execute_tuning() local
88 phase = 0; in sdhci_sirf_execute_tuning()
92 clock_setting | phase, in sdhci_sirf_execute_tuning()
99 mmc_hostname(mmc), phase); in sdhci_sirf_execute_tuning()
101 start = phase; in sdhci_sirf_execute_tuning()
102 end = phase; in sdhci_sirf_execute_tuning()
104 if (phase == (SIRF_TUNING_COUNT - 1) in sdhci_sirf_execute_tuning()
109 mmc_hostname(mmc), phase); in sdhci_sirf_execute_tuning()
117 } while (++phase < SIRF_TUNING_COUNT); in sdhci_sirf_execute_tuning()
124 phase = tuning_value; in sdhci_sirf_execute_tuning()
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/Linux-v5.4/drivers/char/
Dppdev.c392 pp->saved_state.phase = info->phase; in pp_do_ioctl()
394 info->phase = pp->state.phase; in pp_do_ioctl()
423 pp->state.phase = init_phase(mode); in pp_do_ioctl()
427 pp->pdev->port->ieee1284.phase = pp->state.phase; in pp_do_ioctl()
447 int phase; in pp_do_ioctl() local
449 if (copy_from_user(&phase, argp, sizeof(phase))) in pp_do_ioctl()
453 pp->state.phase = phase; in pp_do_ioctl()
456 pp->pdev->port->ieee1284.phase = phase; in pp_do_ioctl()
462 int phase; in pp_do_ioctl() local
465 phase = pp->pdev->port->ieee1284.phase; in pp_do_ioctl()
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/Linux-v5.4/include/trace/events/
Dclk.h156 TP_PROTO(struct clk_core *core, int phase),
158 TP_ARGS(core, phase),
162 __field( int, phase )
167 __entry->phase = phase;
170 TP_printk("%s %d", __get_str(name), (int)__entry->phase)
175 TP_PROTO(struct clk_core *core, int phase),
177 TP_ARGS(core, phase)
182 TP_PROTO(struct clk_core *core, int phase),
184 TP_ARGS(core, phase)
/Linux-v5.4/drivers/parport/
Dieee1284_ops.c58 port->physport->ieee1284.phase = IEEE1284_PH_FWD_DATA; in parport_ieee1284_write_compat()
144 port->physport->ieee1284.phase = IEEE1284_PH_FWD_IDLE; in parport_ieee1284_write_compat()
177 port->ieee1284.phase = IEEE1284_PH_REV_DATA; in parport_ieee1284_read_nibble()
230 port->physport->ieee1284.phase = IEEE1284_PH_REV_IDLE; in parport_ieee1284_read_nibble()
233 port->physport->ieee1284.phase = IEEE1284_PH_HBUSY_DAVAIL; in parport_ieee1284_read_nibble()
268 port->physport->ieee1284.phase = IEEE1284_PH_REV_DATA; in parport_ieee1284_read_byte()
318 port->physport->ieee1284.phase = IEEE1284_PH_REV_IDLE; in parport_ieee1284_read_byte()
321 port->physport->ieee1284.phase = IEEE1284_PH_HBUSY_DAVAIL; in parport_ieee1284_read_byte()
358 port->ieee1284.phase = IEEE1284_PH_REV_IDLE; in ecp_forward_to_reverse()
362 port->ieee1284.phase = IEEE1284_PH_ECP_DIR_UNKNOWN; in ecp_forward_to_reverse()
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Dieee1284.c248 if (port->ieee1284.phase != IEEE1284_PH_FWD_IDLE) { in parport_ieee1284_terminate()
267 port->ieee1284.phase = IEEE1284_PH_FWD_IDLE; in parport_ieee1284_terminate()
305 port->ieee1284.phase = IEEE1284_PH_FWD_IDLE; in parport_ieee1284_terminate()
374 port->ieee1284.phase = IEEE1284_PH_NEGOTIATION; in parport_negotiate()
412 port->ieee1284.phase = IEEE1284_PH_FWD_IDLE; in parport_negotiate()
513 port->ieee1284.phase = IEEE1284_PH_ECP_SETUP; in parport_negotiate()
529 port->ieee1284.phase = IEEE1284_PH_FWD_IDLE; in parport_negotiate()
535 port->ieee1284.phase = IEEE1284_PH_REV_IDLE; in parport_negotiate()
538 port->ieee1284.phase = IEEE1284_PH_FWD_IDLE; in parport_negotiate()
561 port->ieee1284.phase = IEEE1284_PH_HBUSY_DAVAIL; in parport_ieee1284_ack_data_avail()
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/Linux-v5.4/drivers/char/ipmi/
Dkcs_bmc.c90 kcs_bmc->phase = KCS_PHASE_ERROR; in kcs_force_abort()
99 switch (kcs_bmc->phase) { in kcs_bmc_handle_data()
101 kcs_bmc->phase = KCS_PHASE_WRITE_DATA; in kcs_bmc_handle_data()
121 kcs_bmc->phase = KCS_PHASE_WRITE_DONE; in kcs_bmc_handle_data()
143 kcs_bmc->phase = KCS_PHASE_IDLE; in kcs_bmc_handle_data()
155 kcs_bmc->phase = KCS_PHASE_ABORT_ERROR2; in kcs_bmc_handle_data()
162 kcs_bmc->phase = KCS_PHASE_IDLE; in kcs_bmc_handle_data()
181 kcs_bmc->phase = KCS_PHASE_WRITE_START; in kcs_bmc_handle_cmd()
188 if (kcs_bmc->phase != KCS_PHASE_WRITE_DATA) { in kcs_bmc_handle_cmd()
193 kcs_bmc->phase = KCS_PHASE_WRITE_END_CMD; in kcs_bmc_handle_cmd()
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/Linux-v5.4/drivers/clk/meson/
Dclk-phase.c40 struct meson_clk_phase_data *phase = meson_clk_phase_data(clk); in meson_clk_phase_get_phase() local
43 val = meson_parm_read(clk->map, &phase->ph); in meson_clk_phase_get_phase()
45 return meson_clk_degrees_from_val(val, phase->ph.width); in meson_clk_phase_get_phase()
51 struct meson_clk_phase_data *phase = meson_clk_phase_data(clk); in meson_clk_phase_set_phase() local
54 val = meson_clk_degrees_to_val(degrees, phase->ph.width); in meson_clk_phase_set_phase()
55 meson_parm_write(clk->map, &phase->ph, val); in meson_clk_phase_set_phase()
/Linux-v5.4/drivers/scsi/pcmcia/
Dnsp_cs.c230 SCpnt->SCp.phase = PH_UNDETERMINED; in nsp_queuecommand_lck()
371 unsigned char phase, arbit; in nsphw_start_selection() local
375 phase = nsp_index_read(base, SCSIBUSMON); in nsphw_start_selection()
376 if(phase != BUSMON_BUS_FREE) { in nsphw_start_selection()
383 SCpnt->SCp.phase = PH_ARBSTART; in nsphw_start_selection()
403 SCpnt->SCp.phase = PH_SELSTART; in nsphw_start_selection()
550 unsigned char phase, i_src; in nsp_expect_signal() local
556 phase = nsp_index_read(base, SCSIBUSMON); in nsp_expect_signal()
557 if (phase == 0xff) { in nsp_expect_signal()
566 if ((phase & mask) != 0 && (phase & BUSMON_PHASE_MASK) == current_phase) { in nsp_expect_signal()
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/Linux-v5.4/Documentation/devicetree/bindings/mmc/
Dexynos-dw-mshc.txt30 * samsung,dw-mshc-sdr-timing: Specifies the value of CIU clock phase shift value
31 in transmit mode and CIU clock phase shift value in receive mode for single
35 * samsung,dw-mshc-ddr-timing: Specifies the value of CUI clock phase shift value
36 in transmit mode and CIU clock phase shift value in receive mode for double
39 * samsung,dw-mshc-hs400-timing: Specifies the value of CIU TX and RX clock phase
45 - First Cell: CIU clock phase shift value for tx mode.
46 - Second Cell: CIU clock phase shift value for rx mode.
49 - valid value for tx phase shift and rx phase shift is 0 to 7.
50 - when CIU clock divider value is set to 3, all possible 8 phase shift
53 phase shift clocks should be 0.
/Linux-v5.4/drivers/leds/trigger/
Dledtrig-heartbeat.c26 unsigned int phase; member
51 switch (heartbeat_data->phase) { in led_heartbeat_function()
64 heartbeat_data->phase++; in led_heartbeat_function()
70 heartbeat_data->phase++; in led_heartbeat_function()
76 heartbeat_data->phase++; in led_heartbeat_function()
83 heartbeat_data->phase = 0; in led_heartbeat_function()
139 heartbeat_data->phase = 0; in heartbeat_trig_activate()
/Linux-v5.4/tools/power/pm-graph/
Dsleepgraph.py1262 for phase in sorted(self.dmesg.keys()):
1263 if '*' in phase:
1264 p = phase.split('*')
1266 self.dmesg[pnew] = self.dmesg.pop(phase)
1268 for phase in self.sortedPhases():
1269 self.devicegroups.append([phase])
1270 def nextPhase(self, phase, offset): argument
1271 order = self.dmesg[phase]['order'] + offset
1331 for phase in self.sortedPhases():
1332 list = self.dmesg[phase]['list']
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Dbootgraph.py235 def newAction(self, phase, name, pid, start, end, ret, ulen): argument
239 list = self.dmesg[phase]['list']
279 for phase in self.phases:
280 dc = len(self.dmesg[phase]['list'])
281 sysvals.vprint('%9s mode: %.3f - %.3f (%d initcalls)' % (phase,
282 self.dmesg[phase]['start']*1000,
283 self.dmesg[phase]['end']*1000, dc))
293 phase = 'kernel'
357 data.newAction(phase, f, pid, start, ktime, int(r), int(t))
364 phase = 'user'
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/Linux-v5.4/drivers/scsi/
DNCR5380.c747 p = hostdata->connected->SCp.phase; in NCR5380_dma_complete()
951 unsigned char tmp[3], phase; in NCR5380_select() local
1181 phase = PHASE_MSGOUT; in NCR5380_select()
1182 NCR5380_transfer_pio(instance, &phase, &len, &data); in NCR5380_select()
1238 unsigned char *phase, int *count, in NCR5380_transfer_pio() argument
1242 unsigned char p = *phase, tmp; in NCR5380_transfer_pio()
1340 *phase = tmp & PHASE_MASK; in NCR5380_transfer_pio()
1342 *phase = PHASE_UNKNOWN; in NCR5380_transfer_pio()
1344 if (!c || (*phase == p)) in NCR5380_transfer_pio()
1388 unsigned char *msgptr, phase, tmp; in do_abort() local
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Dmac53c94.c54 enum fsc_phase phase; /* what we're currently trying to do */ member
97 if (state->phase == idle) in mac53c94_queue_lck()
153 if (state->phase != idle || state->current_req != NULL) in mac53c94_start()
178 state->phase = selecting; in mac53c94_start()
213 intr, stat, seq, state->phase); in mac53c94_interrupt()
226 intr, stat, seq, state->phase); in mac53c94_interrupt()
234 intr, stat, seq, state->phase); in mac53c94_interrupt()
248 switch (state->phase) { in mac53c94_interrupt()
279 state->phase = dataing; in mac53c94_interrupt()
284 state->phase = completing; in mac53c94_interrupt()
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Dmesh.c96 u8 phase; member
153 enum mesh_phase phase; /* what we're currently trying to do */ member
222 tlp->phase = (ms->msgphase << 4) + ms->phase; in dlog()
253 t, lp->bs1, lp->bs0, lp->phase); in dumplog()
278 lp->bs1, lp->bs0, lp->phase, lp->tgt); in dumpslog()
323 ms->phase, ms->msgphase, ms->conn_tgt, ms->data_ptr); in mesh_dump_regs()
400 ms->phase = idle; in mesh_init()
428 ms->phase = arbitrating; in mesh_start_cmd()
468 if (ms->phase != arbitrating) in mesh_start_cmd()
476 ms->phase = idle; in mesh_start_cmd()
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Daha152x.c878 CURRENT_SC->SCp.phase |= 1 << 16; in setup_expected_interrupts()
880 if(CURRENT_SC->SCp.phase & selecting) { in setup_expected_interrupts()
885 SETPORT(SIMODE0, (CURRENT_SC->SCp.phase & spiordy) ? ENSPIORDY : 0); in setup_expected_interrupts()
908 int phase, void (*done)(struct scsi_cmnd *)) in aha152x_internal_queue() argument
914 SCpnt->SCp.phase = not_issued | phase; in aha152x_internal_queue()
920 if(SCpnt->SCp.phase & (resetting|check_condition)) { in aha152x_internal_queue()
942 if ((phase & resetting) || !scsi_sglist(SCpnt)) { in aha152x_internal_queue()
1080 if(SCpnt->SCp.phase & resetted) { in aha152x_device_reset()
1375 CURRENT_SC->SCp.phase &= ~syncneg; in busfree_run()
1377 if(CURRENT_SC->SCp.phase & completed) { in busfree_run()
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/Linux-v5.4/fs/
Dfsopen.c142 fc->phase = FS_CONTEXT_CREATE_PARAMS; in SYSCALL_DEFINE2()
195 fc->phase = FS_CONTEXT_RECONF_PARAMS; in SYSCALL_DEFINE3()
227 if (fc->phase != FS_CONTEXT_CREATE_PARAMS) in vfs_fsconfig_locked()
231 fc->phase = FS_CONTEXT_CREATING; in vfs_fsconfig_locked()
242 fc->phase = FS_CONTEXT_AWAITING_MOUNT; in vfs_fsconfig_locked()
245 if (fc->phase != FS_CONTEXT_RECONF_PARAMS) in vfs_fsconfig_locked()
247 fc->phase = FS_CONTEXT_RECONFIGURING; in vfs_fsconfig_locked()
261 if (fc->phase != FS_CONTEXT_CREATE_PARAMS && in vfs_fsconfig_locked()
262 fc->phase != FS_CONTEXT_RECONF_PARAMS) in vfs_fsconfig_locked()
267 fc->phase = FS_CONTEXT_FAILED; in vfs_fsconfig_locked()
/Linux-v5.4/drivers/staging/iio/Documentation/
Dsysfs-bus-iio-dds36 Stores phase into Y.
40 control the desired phase Y which is added to the phase
48 the desired value in rad. If shared across all phase registers
56 Specifies the active phase Y which is added to the phase
68 phase is controlled by the respective phase and frequency
/Linux-v5.4/drivers/scsi/arm/
Dfas216.c199 info->scsi.type, info->scsi.phase); in fas216_dumpinfo()
275 if (info->scsi.phase < ARRAY_SIZE(phases) && in fas216_drv_phase()
276 phases[info->scsi.phase]) in fas216_drv_phase()
277 return phases[info->scsi.phase]; in fas216_drv_phase()
564 info->scsi.phase = PHASE_MSGOUT_EXPECT; in fas216_handlesync()
605 info->scsi.phase = PHASE_MSGOUT_EXPECT; in fas216_handlesync()
635 SCp->phase -= bytes_transferred; in fas216_updateptrs()
717 total = info->scsi.SCp.phase; in fas216_cleanuptransfer()
735 if (info->scsi.phase == PHASE_DATAOUT) in fas216_cleanuptransfer()
755 info->scsi.SCp.phase); in fas216_transfer()
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/Linux-v5.4/drivers/infiniband/hw/efa/
Defa_com.c153 sq->phase = 1; in efa_com_admin_init_sq()
190 cq->phase = 1; in efa_com_admin_init_cq()
232 aenq->phase = 1; in efa_com_admin_init_aenq()
337 cmd->aq_common_descriptor.flags |= aq->sq.phase & in __efa_com_submit_admin_cmd()
359 aq->sq.phase = !aq->sq.phase; in __efa_com_submit_admin_cmd()
452 u8 phase; in efa_com_handle_admin_completion() local
458 phase = aq->cq.phase; in efa_com_handle_admin_completion()
464 EFA_ADMIN_ACQ_COMMON_DESC_PHASE_MASK) == phase) { in efa_com_handle_admin_completion()
476 phase = !phase; in efa_com_handle_admin_completion()
483 aq->cq.phase = phase; in efa_com_handle_admin_completion()
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/Linux-v5.4/Documentation/networking/
Dcops.txt52 dummy -seed -phase 2 -net 2000 -addr 2000.10 -zone "1033"
53 lt0 -seed -phase 1 -net 1000 -addr 1000.50 -zone "1033"
56 eth0 -seed -phase 2 -net 3000 -addr 3000.20 -zone "1033"
57 lt0 -seed -phase 1 -net 1000 -addr 1000.50 -zone "1033"
61 lt0 -seed -phase 1 -net 1000 -addr 1000.10 -zone "LocalTalk1"
62 lt1 -seed -phase 1 -net 2000 -addr 2000.20 -zone "LocalTalk2"
63 eth0 -seed -phase 2 -net 3000 -addr 3000.30 -zone "EtherTalk"
/Linux-v5.4/drivers/gpu/drm/arm/
Dmalidp_crtc.c273 u32 phase; in malidp_crtc_atomic_check_scaling() local
304 phase = s->input_w; in malidp_crtc_atomic_check_scaling()
306 ((phase << SE_N_PHASE) / s->output_w + 1) / 2; in malidp_crtc_atomic_check_scaling()
308 phase = s->input_w; in malidp_crtc_atomic_check_scaling()
309 phase <<= (SE_SHIFT_N_PHASE + SE_N_PHASE); in malidp_crtc_atomic_check_scaling()
310 s->h_delta_phase = phase / s->output_w; in malidp_crtc_atomic_check_scaling()
313 phase = s->input_h; in malidp_crtc_atomic_check_scaling()
315 ((phase << SE_N_PHASE) / s->output_h + 1) / 2; in malidp_crtc_atomic_check_scaling()
317 phase = s->input_h; in malidp_crtc_atomic_check_scaling()
318 phase <<= (SE_SHIFT_N_PHASE + SE_N_PHASE); in malidp_crtc_atomic_check_scaling()
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