Searched refs:pfit_control (Results 1 – 9 of 9) sorted by relevance
346 u32 pfit_control; in cdv_intel_lvds_mode_set() local361 pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE | in cdv_intel_lvds_mode_set()365 pfit_control = 0; in cdv_intel_lvds_mode_set()367 pfit_control |= gma_crtc->pipe << PFIT_PIPE_SHIFT; in cdv_intel_lvds_mode_set()370 pfit_control |= PANEL_8TO6_DITHER_ENABLE; in cdv_intel_lvds_mode_set()372 REG_WRITE(PFIT_CONTROL, pfit_control); in cdv_intel_lvds_mode_set()
461 u32 pfit_control; in psb_intel_lvds_mode_set() local476 pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE | in psb_intel_lvds_mode_set()480 pfit_control = 0; in psb_intel_lvds_mode_set()483 pfit_control |= PANEL_8TO6_DITHER_ENABLE; in psb_intel_lvds_mode_set()485 REG_WRITE(PFIT_CONTROL, pfit_control); in psb_intel_lvds_mode_set()
344 u32 pfit_control; in oaktrail_panel_fitter_pipe() local346 pfit_control = REG_READ(PFIT_CONTROL); in oaktrail_panel_fitter_pipe()349 if ((pfit_control & PFIT_ENABLE) == 0) in oaktrail_panel_fitter_pipe()351 return (pfit_control >> 29) & 3; in oaktrail_panel_fitter_pipe()
80 u32 pfit_control; in psb_intel_panel_fitter_pipe() local82 pfit_control = REG_READ(PFIT_CONTROL); in psb_intel_panel_fitter_pipe()85 if ((pfit_control & PFIT_ENABLE) == 0) in psb_intel_panel_fitter_pipe()
558 u32 pfit_control; in cdv_intel_panel_fitter_pipe() local560 pfit_control = REG_READ(PFIT_CONTROL); in cdv_intel_panel_fitter_pipe()563 if ((pfit_control & PFIT_ENABLE) == 0) in cdv_intel_panel_fitter_pipe()565 return (pfit_control >> 29) & 0x3; in cdv_intel_panel_fitter_pipe()
104 u32 pfit_control; in psb_intel_panel_fitter_pipe() local106 pfit_control = REG_READ(PFIT_CONTROL); in psb_intel_panel_fitter_pipe()109 if ((pfit_control & PFIT_ENABLE) == 0) in psb_intel_panel_fitter_pipe()113 return (pfit_control >> 29) & 0x3; in psb_intel_panel_fitter_pipe()
1092 uint32_t pfit_control; in cdv_intel_dp_mode_set() local1097 pfit_control = PFIT_ENABLE; in cdv_intel_dp_mode_set()1099 pfit_control = 0; in cdv_intel_dp_mode_set()1101 pfit_control |= gma_crtc->pipe << PFIT_PIPE_SHIFT; in cdv_intel_dp_mode_set()1103 REG_WRITE(PFIT_CONTROL, pfit_control); in cdv_intel_dp_mode_set()
301 u32 *pfit_control) in i965_scale_aspect() argument311 *pfit_control |= PFIT_ENABLE | in i965_scale_aspect()314 *pfit_control |= PFIT_ENABLE | in i965_scale_aspect()317 *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO; in i965_scale_aspect()321 u32 *pfit_control, u32 *pfit_pgm_ratios, in i9xx_scale_aspect() argument348 *pfit_control |= (PFIT_ENABLE | in i9xx_scale_aspect()364 *pfit_control |= (PFIT_ENABLE | in i9xx_scale_aspect()370 *pfit_control |= (PFIT_ENABLE | in i9xx_scale_aspect()382 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0; in intel_gmch_panel_fitting() local403 i965_scale_aspect(pipe_config, &pfit_control); in intel_gmch_panel_fitting()[all …]
890 u32 pfit_control = I915_READ(PFIT_CONTROL); in update_pfit_vscale_ratio() local900 if (pfit_control & VERT_AUTO_SCALE) in update_pfit_vscale_ratio()
