Searched refs:performance_level_count (Results 1 – 12 of 12) sorted by relevance
809 for (i = 0; i < ps->performance_level_count; i++) { in ni_apply_state_adjust_rules()826 ps->performance_levels[ps->performance_level_count - 1].mclk; in ni_apply_state_adjust_rules()828 ps->performance_levels[ps->performance_level_count - 1].vddci; in ni_apply_state_adjust_rules()835 for (i = 1; i < ps->performance_level_count; i++) { in ni_apply_state_adjust_rules()846 for (i = 1; i < ps->performance_level_count; i++) { in ni_apply_state_adjust_rules()852 for (i = 0; i < ps->performance_level_count; i++) { in ni_apply_state_adjust_rules()857 for (i = 1; i < ps->performance_level_count; i++) { in ni_apply_state_adjust_rules()865 for (i = 1; i < ps->performance_level_count; i++) in ni_apply_state_adjust_rules()870 for (i = 0; i < ps->performance_level_count; i++) in ni_apply_state_adjust_rules()874 for (i = 0; i < ps->performance_level_count; i++) { in ni_apply_state_adjust_rules()[all …]
2310 if (state->performance_level_count == 0) in si_populate_power_containment_values()2313 if (smc_state->levelCount != state->performance_level_count) in si_populate_power_containment_values()2324 for (i = 1; i < state->performance_level_count; i++) { in si_populate_power_containment_values()2392 if (state->performance_level_count == 0) in si_populate_sq_ramping_values()2395 if (smc_state->levelCount != state->performance_level_count) in si_populate_sq_ramping_values()2416 for (i = 0; i < state->performance_level_count; i++) { in si_populate_sq_ramping_values()3031 for (i = ps->performance_level_count - 2; i >= 0; i--) { in si_apply_state_adjust_rules()3036 for (i = 0; i < ps->performance_level_count; i++) { in si_apply_state_adjust_rules()3056 for (i = 0; i < ps->performance_level_count; i++) { in si_apply_state_adjust_rules()3082 mclk = ps->performance_levels[ps->performance_level_count - 1].mclk; in si_apply_state_adjust_rules()[all …]
173 u16 performance_level_count; member
47 u16 performance_level_count; member
830 for (i = 0; i < ps->performance_level_count; i++) { in ci_apply_state_adjust_rules()841 mclk = ps->performance_levels[ps->performance_level_count - 1].mclk; in ci_apply_state_adjust_rules()3756 if (state->performance_level_count < 1) in ci_trim_dpm_states()3759 if (state->performance_level_count == 1) in ci_trim_dpm_states()3861 u32 sclk = state->performance_levels[state->performance_level_count-1].sclk; in ci_find_dpm_states_clocks_in_dpm_table()3863 u32 mclk = state->performance_levels[state->performance_level_count-1].mclk; in ci_find_dpm_states_clocks_in_dpm_table()3902 u32 sclk = state->performance_levels[state->performance_level_count-1].sclk; in ci_populate_and_upload_sclk_mclk_dpm_levels()3903 u32 mclk = state->performance_levels[state->performance_level_count-1].mclk; in ci_populate_and_upload_sclk_mclk_dpm_levels()4804 for (i = 0; i < state->performance_level_count; i++) { in ci_get_maximum_link_speed()5482 ps->performance_level_count = index + 1; in ci_parse_pplib_clock_info()[all …]
2407 if (state->performance_level_count == 0) in si_populate_power_containment_values()2410 if (smc_state->levelCount != state->performance_level_count) in si_populate_power_containment_values()2421 for (i = 1; i < state->performance_level_count; i++) { in si_populate_power_containment_values()2488 if (state->performance_level_count == 0) in si_populate_sq_ramping_values()2491 if (smc_state->levelCount != state->performance_level_count) in si_populate_sq_ramping_values()2512 for (i = 0; i < state->performance_level_count; i++) { in si_populate_sq_ramping_values()3183 if (new_state->performance_levels[new_state->performance_level_count - 1].sclk >= in ni_set_uvd_clock_before_set_eng_clock()3184 current_state->performance_levels[current_state->performance_level_count - 1].sclk) in ni_set_uvd_clock_before_set_eng_clock()3201 if (new_state->performance_levels[new_state->performance_level_count - 1].sclk < in ni_set_uvd_clock_after_set_eng_clock()3202 current_state->performance_levels[current_state->performance_level_count - 1].sclk) in ni_set_uvd_clock_after_set_eng_clock()[all …]
615 u16 performance_level_count; member
2906 PP_ASSERT_WITH_CODE(smu7_ps->performance_level_count == 2, in smu7_apply_state_adjust_rules()2916 for (i = 0; i < smu7_ps->performance_level_count; i++) { in smu7_apply_state_adjust_rules()2969 [smu7_ps->performance_level_count - 1].memory_clock; in smu7_apply_state_adjust_rules()3003 for (i = 0; i < smu7_ps->performance_level_count; i++) { in smu7_apply_state_adjust_rules()3033 [smu7_ps->performance_level_count-1].memory_clock; in smu7_dpm_get_mclk()3055 [smu7_ps->performance_level_count-1].engine_clock; in smu7_dpm_get_sclk()3169 [smu7_power_state->performance_level_count++]); in smu7_get_pp_table_entry_callback_func_v1()3172 …(smu7_power_state->performance_level_count < smum_get_mac_definition(hwmgr, SMU_MAX_LEVELS_GRAPHIC… in smu7_get_pp_table_entry_callback_func_v1()3177 (smu7_power_state->performance_level_count <= in smu7_get_pp_table_entry_callback_func_v1()3197 [smu7_power_state->performance_level_count++]); in smu7_get_pp_table_entry_callback_func_v1()[all …]
3057 [vega10_power_state->performance_level_count++]); in vega10_get_pp_table_entry_callback_func()3060 (vega10_power_state->performance_level_count < in vega10_get_pp_table_entry_callback_func()3066 (vega10_power_state->performance_level_count <= in vega10_get_pp_table_entry_callback_func()3081 [vega10_power_state->performance_level_count++]); in vega10_get_pp_table_entry_callback_func()3157 if (vega10_ps->performance_level_count != 2) in vega10_apply_state_adjust_rules()3166 for (i = 0; i < vega10_ps->performance_level_count; i++) { in vega10_apply_state_adjust_rules()3274 for (i = 0; i < vega10_ps->performance_level_count; i++) { in vega10_apply_state_adjust_rules()3292 [vega10_ps->performance_level_count - 1].gfx_clock; in vega10_find_dpm_states_clocks_in_dpm_table()3295 [vega10_ps->performance_level_count - 1].mem_clock; in vega10_find_dpm_states_clocks_in_dpm_table()3414 PP_ASSERT_WITH_CODE((vega10_ps->performance_level_count >= 1), in vega10_trim_dpm_states()[all …]
82 uint16_t performance_level_count; member
109 uint16_t performance_level_count; member
126 uint16_t performance_level_count; member
