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Searched refs:pd_addr (Results 1 – 25 of 44) sorted by relevance

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/Linux-v5.4/drivers/net/ethernet/intel/i40e/
Di40e_hmc.c120 u64 *pd_addr; in i40e_add_pd_table_entry() local
158 pd_addr = (u64 *)pd_table->pd_page_addr.va; in i40e_add_pd_table_entry()
159 pd_addr += rel_pd_idx; in i40e_add_pd_table_entry()
162 memcpy(pd_addr, &page_desc, sizeof(u64)); in i40e_add_pd_table_entry()
197 u64 *pd_addr; in i40e_remove_pd_bp() local
223 pd_addr = (u64 *)pd_table->pd_page_addr.va; in i40e_remove_pd_bp()
224 pd_addr += rel_pd_idx; in i40e_remove_pd_bp()
225 memset(pd_addr, 0, sizeof(u64)); in i40e_remove_pd_bp()
/Linux-v5.4/drivers/gpu/drm/radeon/
Dradeon_trace.h108 TP_PROTO(uint64_t pd_addr, unsigned ring, unsigned id),
109 TP_ARGS(pd_addr, ring, id),
111 __field(u64, pd_addr)
117 __entry->pd_addr = pd_addr;
122 __entry->pd_addr, __entry->ring, __entry->id)
Dsi_dma.c188 unsigned vm_id, uint64_t pd_addr) in si_dma_vm_flush() argument
197 radeon_ring_write(ring, pd_addr >> 12); in si_dma_vm_flush()
Dradeon_vm.c240 uint64_t pd_addr = radeon_bo_gpu_offset(vm->page_directory); in radeon_vm_flush() local
243 if (pd_addr != vm_id->pd_gpu_addr || !vm_id->flushed_updates || in radeon_vm_flush()
246 trace_radeon_vm_flush(pd_addr, ring, vm->ids[ring].id); in radeon_vm_flush()
249 vm_id->pd_gpu_addr = pd_addr; in radeon_vm_flush()
645 uint64_t pd_addr = radeon_bo_gpu_offset(pd); in radeon_vm_update_page_directory() local
680 pde = pd_addr + pt_idx * 8; in radeon_vm_update_page_directory()
Dni_dma.c450 unsigned vm_id, uint64_t pd_addr) in cayman_dma_vm_flush() argument
454 radeon_ring_write(ring, pd_addr >> 12); in cayman_dma_vm_flush()
Dradeon_asic.h615 unsigned vm_id, uint64_t pd_addr);
641 unsigned vm_id, uint64_t pd_addr);
723 unsigned vm_id, uint64_t pd_addr);
746 unsigned vm_id, uint64_t pd_addr);
830 unsigned vm_id, uint64_t pd_addr);
849 unsigned vm_id, uint64_t pd_addr);
Dcik_sdma.c948 unsigned vm_id, uint64_t pd_addr) in cik_dma_vm_flush() argument
959 radeon_ring_write(ring, pd_addr >> 12); in cik_dma_vm_flush()
/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Dvcn_v2_0.h37 unsigned vmid, uint64_t pd_addr);
49 unsigned int vmid, uint64_t pd_addr);
61 unsigned vmid, uint64_t pd_addr);
Damdgpu_gmc.c70 uint64_t pd_addr; in amdgpu_gmc_pd_addr() local
76 amdgpu_gmc_get_pde_for_bo(bo, -1, &pd_addr, &flags); in amdgpu_gmc_pd_addr()
77 pd_addr |= flags; in amdgpu_gmc_pd_addr()
79 pd_addr = amdgpu_bo_gpu_offset(bo); in amdgpu_gmc_pd_addr()
81 return pd_addr; in amdgpu_gmc_pd_addr()
Damdgpu_trace.h226 __field(u64, pd_addr)
235 __entry->pd_addr = job->vm_pd_addr;
240 __entry->vm_hub, __entry->pd_addr, __entry->needs_flush)
368 uint64_t pd_addr),
369 TP_ARGS(ring, vmid, pd_addr),
374 __field(u64, pd_addr)
381 __entry->pd_addr = pd_addr;
385 __entry->vm_hub,__entry->pd_addr)
Dvcn_v2_0.c1619 unsigned vmid, uint64_t pd_addr) in vcn_v2_0_dec_ring_emit_vm_flush() argument
1624 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr); in vcn_v2_0_dec_ring_emit_vm_flush()
1628 data1 = lower_32_bits(pd_addr); in vcn_v2_0_dec_ring_emit_vm_flush()
1775 unsigned int vmid, uint64_t pd_addr) in vcn_v2_0_enc_ring_emit_vm_flush() argument
1779 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr); in vcn_v2_0_enc_ring_emit_vm_flush()
1783 lower_32_bits(pd_addr), 0xffffffff); in vcn_v2_0_enc_ring_emit_vm_flush()
2015 unsigned vmid, uint64_t pd_addr) in vcn_v2_0_jpeg_ring_emit_vm_flush() argument
2020 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr); in vcn_v2_0_jpeg_ring_emit_vm_flush()
2024 data1 = lower_32_bits(pd_addr); in vcn_v2_0_jpeg_ring_emit_vm_flush()
Dvcn_v1_0.c1560 unsigned vmid, uint64_t pd_addr) in vcn_v1_0_dec_ring_emit_vm_flush() argument
1565 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr); in vcn_v1_0_dec_ring_emit_vm_flush()
1569 data1 = lower_32_bits(pd_addr); in vcn_v1_0_dec_ring_emit_vm_flush()
1701 unsigned int vmid, uint64_t pd_addr) in vcn_v1_0_enc_ring_emit_vm_flush() argument
1705 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr); in vcn_v1_0_enc_ring_emit_vm_flush()
1709 lower_32_bits(pd_addr), 0xffffffff); in vcn_v1_0_enc_ring_emit_vm_flush()
1965 unsigned vmid, uint64_t pd_addr) in vcn_v1_0_jpeg_ring_emit_vm_flush() argument
1970 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr); in vcn_v1_0_jpeg_ring_emit_vm_flush()
1974 data1 = lower_32_bits(pd_addr); in vcn_v1_0_jpeg_ring_emit_vm_flush()
Dgmc_v10_0.c335 unsigned vmid, uint64_t pd_addr) in gmc_v10_0_emit_flush_gpu_tlb() argument
342 lower_32_bits(pd_addr)); in gmc_v10_0_emit_flush_gpu_tlb()
345 upper_32_bits(pd_addr)); in gmc_v10_0_emit_flush_gpu_tlb()
351 return pd_addr; in gmc_v10_0_emit_flush_gpu_tlb()
Duvd_v7_0.c1371 unsigned vmid, uint64_t pd_addr) in uvd_v7_0_ring_emit_vm_flush() argument
1376 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr); in uvd_v7_0_ring_emit_vm_flush()
1380 data1 = lower_32_bits(pd_addr); in uvd_v7_0_ring_emit_vm_flush()
1414 unsigned int vmid, uint64_t pd_addr) in uvd_v7_0_enc_ring_emit_vm_flush() argument
1418 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr); in uvd_v7_0_enc_ring_emit_vm_flush()
1422 lower_32_bits(pd_addr), 0xffffffff); in uvd_v7_0_enc_ring_emit_vm_flush()
Damdgpu_gmc.h96 uint64_t pd_addr);
Dgmc_v9_0.c517 unsigned vmid, uint64_t pd_addr) in gmc_v9_0_emit_flush_gpu_tlb() argument
525 lower_32_bits(pd_addr)); in gmc_v9_0_emit_flush_gpu_tlb()
528 upper_32_bits(pd_addr)); in gmc_v9_0_emit_flush_gpu_tlb()
534 return pd_addr; in gmc_v9_0_emit_flush_gpu_tlb()
Dvce_v4_0.c990 unsigned int vmid, uint64_t pd_addr) in vce_v4_0_emit_vm_flush() argument
994 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr); in vce_v4_0_emit_vm_flush()
998 lower_32_bits(pd_addr), 0xffffffff); in vce_v4_0_emit_vm_flush()
Dgmc_v6_0.c372 unsigned vmid, uint64_t pd_addr) in gmc_v6_0_emit_flush_gpu_tlb() argument
381 amdgpu_ring_emit_wreg(ring, reg, pd_addr >> 12); in gmc_v6_0_emit_flush_gpu_tlb()
386 return pd_addr; in gmc_v6_0_emit_flush_gpu_tlb()
Duvd_v6_0.c1043 unsigned vmid, uint64_t pd_addr) in uvd_v6_0_ring_emit_vm_flush() argument
1045 amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr); in uvd_v6_0_ring_emit_vm_flush()
1103 unsigned int vmid, uint64_t pd_addr) in uvd_v6_0_enc_ring_emit_vm_flush() argument
1107 amdgpu_ring_write(ring, pd_addr >> 12); in uvd_v6_0_enc_ring_emit_vm_flush()
Dgmc_v7_0.c444 unsigned vmid, uint64_t pd_addr) in gmc_v7_0_emit_flush_gpu_tlb() argument
452 amdgpu_ring_emit_wreg(ring, reg, pd_addr >> 12); in gmc_v7_0_emit_flush_gpu_tlb()
457 return pd_addr; in gmc_v7_0_emit_flush_gpu_tlb()
Dsi_dma.c445 unsigned vmid, uint64_t pd_addr) in si_dma_ring_emit_vm_flush() argument
447 amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr); in si_dma_ring_emit_vm_flush()
Dvce_v3_0.c849 unsigned int vmid, uint64_t pd_addr) in vce_v3_0_emit_vm_flush() argument
853 amdgpu_ring_write(ring, pd_addr >> 12); in vce_v3_0_emit_vm_flush()
/Linux-v5.4/drivers/clk/mediatek/
Dclk-pll.c41 void __iomem *pd_addr; member
124 val = readl(pll->pd_addr); in mtk_pll_set_rate_regs()
129 if (pll->pd_addr != pll->pcw_addr) { in mtk_pll_set_rate_regs()
130 writel(val, pll->pd_addr); in mtk_pll_set_rate_regs()
216 postdiv = (readl(pll->pd_addr) >> pll->data->pd_shift) & POSTDIV_MASK; in mtk_pll_recalc_rate()
314 pll->pd_addr = base + data->pd_reg; in mtk_clk_register_pll()
/Linux-v5.4/drivers/infiniband/hw/i40iw/
Di40iw_hmc.c626 u64 *pd_addr; in i40iw_add_pd_table_entry() local
657 pd_addr = (u64 *)pd_table->pd_page_addr.va; in i40iw_add_pd_table_entry()
658 pd_addr += rel_pd_idx; in i40iw_add_pd_table_entry()
660 memcpy(pd_addr, &page_desc, sizeof(*pd_addr)); in i40iw_add_pd_table_entry()
702 u64 *pd_addr; in i40iw_remove_pd_bp() local
721 pd_addr = (u64 *)pd_table->pd_page_addr.va; in i40iw_remove_pd_bp()
722 pd_addr += rel_pd_idx; in i40iw_remove_pd_bp()
723 memset(pd_addr, 0, sizeof(u64)); in i40iw_remove_pd_bp()
/Linux-v5.4/drivers/gpu/drm/bridge/analogix/
Danalogix_dp_reg.c235 u32 pd_addr = ANALOGIX_DP_PLL_CTL; in analogix_dp_set_pll_power_down() local
238 pd_addr = ANALOGIX_DP_PD; in analogix_dp_set_pll_power_down()
242 reg = readl(dp->reg_base + pd_addr); in analogix_dp_set_pll_power_down()
247 writel(reg, dp->reg_base + pd_addr); in analogix_dp_set_pll_power_down()

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