Searched refs:od_enabled (Results 1 – 14 of 14) sorted by relevance
105 hwmgr->od_enabled = false; in hwmgr_early_init()109 hwmgr->od_enabled = false; in hwmgr_early_init()123 hwmgr->od_enabled = false; in hwmgr_early_init()176 hwmgr->od_enabled = false; in hwmgr_early_init()451 hwmgr->od_enabled = true; in hwmgr_set_user_specify_caps()
1562 if (hwmgr->od_enabled) in vega10_populate_single_gfx_level()1625 if (hwmgr->od_enabled) { in vega10_populate_single_soc_level()1727 if (hwmgr->od_enabled) in vega10_populate_vddc_soc_levels()1763 if (hwmgr->od_enabled) in vega10_populate_single_memory_level()2509 if (hwmgr->od_enabled) { in vega10_init_smc_table()3341 if (hwmgr->od_enabled && data->need_update_dpm_table & DPMTABLE_OD_UPDATE_SCLK) { in vega10_populate_and_upload_sclk_mclk_dpm_levels()3347 if (hwmgr->od_enabled && data->need_update_dpm_table & DPMTABLE_OD_UPDATE_MCLK) { in vega10_populate_and_upload_sclk_mclk_dpm_levels()4543 if (hwmgr->od_enabled) { in vega10_print_clock_levels()4553 if (hwmgr->od_enabled) { in vega10_print_clock_levels()4563 if (hwmgr->od_enabled) { in vega10_print_clock_levels()[all …]
964 if (hwmgr->od_enabled) { in smu7_setup_default_dpm_tables()3768 if (hwmgr->od_enabled && data->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_SCLK) { in smu7_populate_and_upload_sclk_mclk_dpm_levels()3775 if (hwmgr->od_enabled && data->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_MCLK) { in smu7_populate_and_upload_sclk_mclk_dpm_levels()3810 if (!hwmgr->od_enabled && (dpm_table->dpm_levels[i].value < low_limit in smu7_trim_single_dpm_states()4501 if (hwmgr->od_enabled) { in smu7_print_clock_levels()4510 if (hwmgr->od_enabled) { in smu7_print_clock_levels()4519 if (hwmgr->od_enabled) { in smu7_print_clock_levels()4861 if (!hwmgr->od_enabled) { in smu7_odn_edit_dpm_table()
1097 hwmgr->od_enabled = false; in vega20_od8_set_feature_capabilities()
996 if (hwmgr->od_enabled) { in pp_set_power_limit()1022 if (hwmgr->od_enabled) { in pp_get_power_limit()
717 smu->od_enabled = true; in smu_set_funcs()722 smu->od_enabled = true; in smu_set_funcs()
1583 if (smu->od_enabled) { in navi10_get_power_limit()
1363 if (smu->od_enabled) { in arcturus_get_power_limit()
2878 if ((is_support_sw_smu(adev) && adev->smu.od_enabled) || in amdgpu_pm_sysfs_init()2879 (!is_support_sw_smu(adev) && hwmgr->od_enabled)) { in amdgpu_pm_sysfs_init()2974 if ((is_support_sw_smu(adev) && adev->smu.od_enabled) || in amdgpu_pm_sysfs_fini()2975 (!is_support_sw_smu(adev) && hwmgr->od_enabled)) in amdgpu_pm_sysfs_fini()
792 bool od_enabled; member
361 bool od_enabled; member
951 if (hwmgr->od_enabled) in fiji_populate_single_graphic_level()1175 if (hwmgr->od_enabled) in fiji_populate_single_memory_level()
920 if (hwmgr->od_enabled) in polaris10_populate_single_graphic_level()1082 if (hwmgr->od_enabled) in polaris10_populate_single_memory_level()
629 if (hwmgr->od_enabled) in tonga_populate_single_graphic_level()977 if (hwmgr->od_enabled) in tonga_populate_single_memory_level()
