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Searched refs:ocelot (Results 1 – 25 of 29) sorted by relevance

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/Linux-v5.4/drivers/net/ethernet/mscc/
Docelot.c50 static inline u32 ocelot_mact_read_macaccess(struct ocelot *ocelot) in ocelot_mact_read_macaccess() argument
52 return ocelot_read(ocelot, ANA_TABLES_MACACCESS); in ocelot_mact_read_macaccess()
55 static inline int ocelot_mact_wait_for_completion(struct ocelot *ocelot) in ocelot_mact_wait_for_completion() argument
60 ocelot, val, in ocelot_mact_wait_for_completion()
66 static void ocelot_mact_select(struct ocelot *ocelot, in ocelot_mact_select() argument
83 ocelot_write(ocelot, macl, ANA_TABLES_MACLDATA); in ocelot_mact_select()
84 ocelot_write(ocelot, mach, ANA_TABLES_MACHDATA); in ocelot_mact_select()
88 static int ocelot_mact_learn(struct ocelot *ocelot, int port, in ocelot_mact_learn() argument
93 ocelot_mact_select(ocelot, mac, vid); in ocelot_mact_learn()
96 ocelot_write(ocelot, ANA_TABLES_MACACCESS_VALID | in ocelot_mact_learn()
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Docelot_board.c44 static int ocelot_rx_frame_word(struct ocelot *ocelot, u8 grp, bool ifh, in ocelot_rx_frame_word() argument
50 val = ocelot_read_rix(ocelot, QS_XTR_RD, grp); in ocelot_rx_frame_word()
56 val = ocelot_read_rix(ocelot, QS_XTR_RD, grp); in ocelot_rx_frame_word()
69 val = ocelot_read_rix(ocelot, QS_XTR_RD, grp); in ocelot_rx_frame_word()
71 *rval = ocelot_read_rix(ocelot, QS_XTR_RD, grp); in ocelot_rx_frame_word()
77 *rval = ocelot_read_rix(ocelot, QS_XTR_RD, grp); in ocelot_rx_frame_word()
89 struct ocelot *ocelot = arg; in ocelot_xtr_irq_handler() local
93 if (!(ocelot_read(ocelot, QS_XTR_DATA_PRESENT) & BIT(grp))) in ocelot_xtr_irq_handler()
107 err = ocelot_rx_frame_word(ocelot, grp, true, &ifh[i]); in ocelot_xtr_irq_handler()
117 dev = ocelot->ports[info.port]->dev; in ocelot_xtr_irq_handler()
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Docelot_io.c13 u32 __ocelot_read_ix(struct ocelot *ocelot, u32 reg, u32 offset) in __ocelot_read_ix() argument
20 regmap_read(ocelot->targets[target], in __ocelot_read_ix()
21 ocelot->map[target][reg & REG_MASK] + offset, &val); in __ocelot_read_ix()
26 void __ocelot_write_ix(struct ocelot *ocelot, u32 val, u32 reg, u32 offset) in __ocelot_write_ix() argument
32 regmap_write(ocelot->targets[target], in __ocelot_write_ix()
33 ocelot->map[target][reg & REG_MASK] + offset, val); in __ocelot_write_ix()
37 void __ocelot_rmw_ix(struct ocelot *ocelot, u32 val, u32 mask, u32 reg, in __ocelot_rmw_ix() argument
44 regmap_update_bits(ocelot->targets[target], in __ocelot_rmw_ix()
45 ocelot->map[target][reg & REG_MASK] + offset, in __ocelot_rmw_ix()
62 int ocelot_regfields_init(struct ocelot *ocelot, in ocelot_regfields_init() argument
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Docelot.h437 struct ocelot { struct
483 struct ocelot *ocelot; argument
514 u32 __ocelot_read_ix(struct ocelot *ocelot, u32 reg, u32 offset);
515 #define ocelot_read_ix(ocelot, reg, gi, ri) __ocelot_read_ix(ocelot, reg, reg##_GSZ * (gi) + reg##_… argument
516 #define ocelot_read_gix(ocelot, reg, gi) __ocelot_read_ix(ocelot, reg, reg##_GSZ * (gi)) argument
517 #define ocelot_read_rix(ocelot, reg, ri) __ocelot_read_ix(ocelot, reg, reg##_RSZ * (ri)) argument
518 #define ocelot_read(ocelot, reg) __ocelot_read_ix(ocelot, reg, 0) argument
520 void __ocelot_write_ix(struct ocelot *ocelot, u32 val, u32 reg, u32 offset);
521 #define ocelot_write_ix(ocelot, val, reg, gi, ri) __ocelot_write_ix(ocelot, val, reg, reg##_GSZ * (… argument
522 #define ocelot_write_gix(ocelot, val, reg, gi) __ocelot_write_ix(ocelot, val, reg, reg##_GSZ * (gi)) argument
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Docelot_police.c49 struct ocelot *ocelot = port->ocelot; in qos_policer_conf_set() local
151 ocelot_write_gix(ocelot, value, ANA_POL_MODE_CFG, pol_ix); in qos_policer_conf_set()
153 ocelot_write_gix(ocelot, in qos_policer_conf_set()
158 ocelot_write_gix(ocelot, in qos_policer_conf_set()
162 ocelot_write_gix(ocelot, in qos_policer_conf_set()
167 ocelot_write_gix(ocelot, in qos_policer_conf_set()
177 struct ocelot *ocelot = port->ocelot; in ocelot_port_policer_add() local
196 ocelot_rmw_gix(ocelot, in ocelot_port_policer_add()
208 struct ocelot *ocelot = port->ocelot; in ocelot_port_policer_del() local
220 ocelot_rmw_gix(ocelot, in ocelot_port_policer_del()
Docelot_ace.c98 static u32 vcap_s2_read_update_ctrl(struct ocelot *oc) in vcap_s2_read_update_ctrl()
103 static void vcap_cmd(struct ocelot *oc, u16 ix, int cmd, int sel) in vcap_cmd()
128 static void vcap_row_cmd(struct ocelot *oc, u32 row, int cmd, int sel) in vcap_row_cmd()
133 static void vcap_entry2cache(struct ocelot *oc, struct vcap_data *data) in vcap_entry2cache()
144 static void vcap_cache2entry(struct ocelot *oc, struct vcap_data *data) in vcap_cache2entry()
156 static void vcap_action2cache(struct ocelot *oc, struct vcap_data *data) in vcap_action2cache()
174 static void vcap_cache2action(struct ocelot *oc, struct vcap_data *data) in vcap_cache2action()
329 static void is2_entry_set(struct ocelot *ocelot, int ix, in is2_entry_set() argument
342 vcap_row_cmd(ocelot, row, VCAP_CMD_READ, VCAP_SEL_ALL); in is2_entry_set()
343 vcap_cache2entry(ocelot, &data); in is2_entry_set()
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Docelot_regs.c397 static void ocelot_pll5_init(struct ocelot *ocelot) in ocelot_pll5_init() argument
402 regmap_write(ocelot->targets[HSIO], HSIO_PLL5G_CFG4, in ocelot_pll5_init()
405 regmap_write(ocelot->targets[HSIO], HSIO_PLL5G_CFG0, in ocelot_pll5_init()
417 regmap_write(ocelot->targets[HSIO], HSIO_PLL5G_CFG2, in ocelot_pll5_init()
426 int ocelot_chip_init(struct ocelot *ocelot) in ocelot_chip_init() argument
430 ocelot->map = ocelot_regmap; in ocelot_chip_init()
431 ocelot->stats_layout = ocelot_stats_layout; in ocelot_chip_init()
432 ocelot->num_stats = ARRAY_SIZE(ocelot_stats_layout); in ocelot_chip_init()
433 ocelot->shared_queue_sz = 224 * 1024; in ocelot_chip_init()
435 ret = ocelot_regfields_init(ocelot, ocelot_regfields); in ocelot_chip_init()
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Docelot_ace.h216 struct ocelot *ocelot; member
224 int ocelot_ace_init(struct ocelot *ocelot);
DMakefile3 mscc_ocelot_common-y := ocelot.o ocelot_io.o
/Linux-v5.4/Documentation/devicetree/bindings/mips/
Dmscc.txt7 - compatible: "mscc,ocelot"
19 - compatible: Should be "mscc,ocelot-chip-regs", "simple-mfd", "syscon"
24 compatible = "mscc,ocelot-chip-regs", "simple-mfd", "syscon";
36 - compatible: Should be "mscc,ocelot-cpu-syscon", "syscon"
41 compatible = "mscc,ocelot-cpu-syscon", "syscon";
52 - compatible: Should be "mscc,ocelot-hsio", "syscon", "simple-mfd"
57 compatible = "mscc,ocelot-hsio", "syscon", "simple-mfd";
/Linux-v5.4/arch/mips/boot/dts/mscc/
Docelot.dtsi7 compatible = "mscc,ocelot";
55 compatible = "mscc,ocelot-cpu-syscon", "syscon";
60 compatible = "mscc,ocelot-icpu-intr";
82 compatible = "mscc,ocelot-i2c", "snps,designware-i2c";
108 compatible = "mscc,ocelot-spi", "snps,dw-apb-ssi";
186 compatible = "mscc,ocelot-chip-reset";
191 compatible = "mscc,ocelot-pinctrl";
225 compatible = "mscc,ocelot-miim";
247 compatible = "mscc,ocelot-miim";
256 compatible = "mscc,ocelot-hsio", "syscon", "simple-mfd";
Docelot_pcb120.dts7 #include <dt-bindings/phy/phy-ocelot-serdes.h>
8 #include "ocelot.dtsi"
11 compatible = "mscc,ocelot-pcb120", "mscc,ocelot";
Docelot_pcb123.dts6 #include "ocelot.dtsi"
9 compatible = "mscc,ocelot-pcb123", "mscc,ocelot";
/Linux-v5.4/Documentation/devicetree/bindings/pinctrl/
Dmscc,ocelot-pinctrl.txt5 - compatible : Should be "mscc,ocelot-pinctrl" or
16 The ocelot-pinctrl driver uses the generic pin multiplexing and generic pin
25 compatible = "mscc,ocelot-pinctrl";
/Linux-v5.4/Documentation/devicetree/bindings/power/reset/
Docelot-reset.txt7 - compatible: "mscc,ocelot-chip-reset"
11 compatible = "mscc,ocelot-chip-reset";
/Linux-v5.4/Documentation/devicetree/bindings/interrupt-controller/
Dmscc,ocelot-icpu-intr.txt5 - compatible : should be "mscc,ocelot-icpu-intr"
15 compatible = "mscc,ocelot-icpu-intr";
/Linux-v5.4/Documentation/devicetree/bindings/net/
Dmscc-miim.txt5 - compatible: must be "mscc,ocelot-miim"
19 compatible = "mscc,ocelot-miim";
/Linux-v5.4/Documentation/devicetree/bindings/i2c/
Di2c-designware.txt6 or "mscc,ocelot-i2c" with "snps,designware-i2c" for fallback
24 - reg : for "mscc,ocelot-i2c", a second register set to configure the SDA hold
29 on Microsemi SoCs ("mscc,ocelot-i2c" compatible).
/Linux-v5.4/Documentation/devicetree/bindings/phy/
Dphy-ocelot-serdes.txt19 This is a child of the HSIO syscon ("mscc,ocelot-hsio", see
28 defined in dt-bindings/phy/phy-ocelot-serdes.h
/Linux-v5.4/drivers/phy/mscc/
DMakefile6 obj-$(CONFIG_PHY_OCELOT_SERDES) := phy-ocelot-serdes.o
/Linux-v5.4/arch/mips/generic/
DMakefile13 obj-$(CONFIG_LEGACY_BOARD_OCELOT) += board-ocelot.o
Dboard-ocelot.c74 MIPS_MACHINE(ocelot) = {
DPlatform19 its-$(CONFIG_FIT_IMAGE_FDT_OCELOT) += board-ocelot.its.S
/Linux-v5.4/drivers/power/reset/
DMakefile15 obj-$(CONFIG_POWER_RESET_OCELOT_RESET) += ocelot-reset.o
/Linux-v5.4/Documentation/devicetree/bindings/spi/
Dsnps,dw-apb-ssi.txt4 - compatible : "snps,dw-apb-ssi" or "mscc,<soc>-spi", where soc is "ocelot" or

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