Home
last modified time | relevance | path

Searched refs:nv_funcs (Results 1 – 4 of 4) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm_pp_smu.c927 funcs->nv_funcs.pp_smu.dm = ctx; in dm_pp_get_funcs()
928 funcs->nv_funcs.set_display_count = pp_nv_set_display_count; in dm_pp_get_funcs()
929 funcs->nv_funcs.set_hard_min_dcfclk_by_freq = in dm_pp_get_funcs()
931 funcs->nv_funcs.set_min_deep_sleep_dcfclk = in dm_pp_get_funcs()
933 funcs->nv_funcs.set_voltage_by_freq = in dm_pp_get_funcs()
935 funcs->nv_funcs.set_wm_ranges = pp_nv_set_wm_ranges; in dm_pp_get_funcs()
938 funcs->nv_funcs.set_pme_wa_enable = NULL; in dm_pp_get_funcs()
940 funcs->nv_funcs.set_hard_min_uclk_by_freq = pp_nv_set_hard_min_uclk_by_freq; in dm_pp_get_funcs()
942 funcs->nv_funcs.get_maximum_sustainable_clocks = pp_nv_get_maximum_sustainable_clocks; in dm_pp_get_funcs()
944 funcs->nv_funcs.get_uclk_dpm_states = pp_nv_get_uclk_dpm_states; in dm_pp_get_funcs()
[all …]
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
Ddcn20_clk_mgr.c151 pp_smu = &dc->res_pool->pp_smu->nv_funcs; in request_voltage_and_program_disp_clk()
172 pp_smu = &dc->res_pool->pp_smu->nv_funcs; in request_voltage_and_program_global_dpp_clk()
212 pp_smu = &dc->res_pool->pp_smu->nv_funcs; in dcn2_update_clocks()
385 pp_smu = &clk_mgr->pp_smu->nv_funcs; in dcn2_enable_pme_wa()
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/
Ddm_pp_smu.h298 struct pp_smu_funcs_nv nv_funcs; member
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_resource.c3277 if (pool->base.pp_smu->nv_funcs.get_uclk_dpm_states) { in init_soc_bounding_box()
3278 status = (pool->base.pp_smu->nv_funcs.get_uclk_dpm_states) in init_soc_bounding_box()
3279 (&pool->base.pp_smu->nv_funcs.pp_smu, uclk_states, &num_states); in init_soc_bounding_box()
3284 if (pool->base.pp_smu->nv_funcs.get_maximum_sustainable_clocks) { in init_soc_bounding_box()
3285 status = (*pool->base.pp_smu->nv_funcs.get_maximum_sustainable_clocks) in init_soc_bounding_box()
3286 (&pool->base.pp_smu->nv_funcs.pp_smu, &max_clocks); in init_soc_bounding_box()
3484 if (pool->base.pp_smu->nv_funcs.set_wm_ranges) in construct()
3485 pool->base.pp_smu->nv_funcs.set_wm_ranges(&pool->base.pp_smu->nv_funcs.pp_smu, &ranges); in construct()