Searched refs:num_display (Results 1 – 17 of 17) sorted by relevance
79 uint32_t num_display; /* total number of display*/ member
1479 if ((hwmgr->display_config->num_display > 1) && in vega12_notify_smc_display_config_after_ps_adjustment()2179 disable_mclk_switching = ((1 < hwmgr->display_config->num_display) && in vega12_apply_clocks_adjust_rules()2388 PPSMC_MSG_NumOfDisplays, hwmgr->display_config->num_display); in vega12_display_configuration_changed_task()2438 if (data->display_timing.num_existing_displays != hwmgr->display_config->num_display) in vega12_check_smc_update_required_for_display_configuration()
2956 if (hwmgr->display_config->num_display == 0) in smu7_apply_state_adjust_rules()2959 disable_mclk_switching = ((1 < hwmgr->display_config->num_display) && in smu7_apply_state_adjust_rules()3640 if (data->display_timing.num_existing_displays != hwmgr->display_config->num_display) in smu7_find_dpm_states_clocks_in_dpm_table()4048 if (hwmgr->display_config->num_display > 1 && in smu7_notify_smc_display_config_after_ps_adjustment()4070 …LD(display_gap, CG_DISPLAY_GAP_CNTL, DISP_GAP, (hwmgr->display_config->num_display > 0) ? DISPLAY_… in smu7_program_display_gap()4167 if (data->display_timing.num_existing_displays != hwmgr->display_config->num_display) in smu7_check_smc_update_required_for_display_configuration()
3220 if (hwmgr->display_config->num_display == 0) in vega10_apply_state_adjust_rules()3223 disable_mclk_switching = ((1 < hwmgr->display_config->num_display) && in vega10_apply_state_adjust_rules()3322 if (data->display_timing.num_existing_displays != hwmgr->display_config->num_display) in vega10_find_dpm_states_clocks_in_dpm_table()3924 if ((hwmgr->display_config->num_display > 1) && in vega10_notify_smc_display_config_after_ps_adjustment()4597 PPSMC_MSG_NumOfDisplays, hwmgr->display_config->num_display); in vega10_display_configuration_changed_task()4684 if (data->display_timing.num_existing_displays != hwmgr->display_config->num_display) in vega10_check_smc_update_required_for_display_configuration()
664 hwmgr->display_config->num_display > 3 ? in smu10_dpm_force_dpm_level()
3564 hwmgr->display_config->num_display); in vega20_display_configuration_changed_task()3638 disable_mclk_switching = ((1 < hwmgr->display_config->num_display) && in vega20_apply_clocks_adjust_rules()3813 hwmgr->display_config->num_display) in vega20_check_smc_update_required_for_display_configuration()
1062 || (hwmgr->display_config->num_display >= 3); in smu8_apply_state_adjust_rules()
63 adev->pm.pm_display_cfg.num_display = in dm_pp_apply_display_requirements()
879 smu->display_config->num_display); in navi10_display_config_changed()
2094 smu->display_config->num_display); in vega20_display_config_changed()2109 disable_mclk_switching = ((1 < smu->display_config->num_display) && in vega20_apply_clocks_adjust_rules()
1010 data->display_timing.num_existing_displays = hwmgr->display_config->num_display; in vegam_populate_single_memory_level()
1203 data->display_timing.num_existing_displays = hwmgr->display_config->num_display; in fiji_populate_single_memory_level()
1282 data->display_timing.num_existing_displays = hwmgr->display_config->num_display; in iceland_populate_single_memory_level()
1106 data->display_timing.num_existing_displays = hwmgr->display_config->num_display; in polaris10_populate_single_memory_level()
1234 data->display_timing.num_existing_displays = hwmgr->display_config->num_display; in ci_populate_single_memory_level()
1016 data->display_timing.num_existing_displays = hwmgr->display_config->num_display; in tonga_populate_single_memory_level()
3017 adev->pm.pm_display_cfg.num_display = adev->pm.dpm.new_active_crtc_count; in amdgpu_pm_compute_clocks()
