| /Linux-v5.4/include/linux/mtd/ |
| D | nand.h | 155 int (*erase)(struct nand_device *nand, const struct nand_pos *pos);
156 int (*markbad)(struct nand_device *nand, const struct nand_pos *pos);
157 bool (*isbad)(struct nand_device *nand, const struct nand_pos *pos);
223 static inline struct mtd_info *nanddev_to_mtd(struct nand_device *nand) in nanddev_to_mtd() argument
225 return &nand->mtd; in nanddev_to_mtd()
234 static inline unsigned int nanddev_bits_per_cell(const struct nand_device *nand) in nanddev_bits_per_cell() argument
236 return nand->memorg.bits_per_cell; in nanddev_bits_per_cell()
245 static inline size_t nanddev_page_size(const struct nand_device *nand) in nanddev_page_size() argument
247 return nand->memorg.pagesize; in nanddev_page_size()
257 nanddev_per_page_oobsize(const struct nand_device *nand) in nanddev_per_page_oobsize() argument
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| /Linux-v5.4/drivers/mtd/nand/ |
| D | core.c | 22 bool nanddev_isbad(struct nand_device *nand, const struct nand_pos *pos) in nanddev_isbad() argument
24 if (nanddev_bbt_is_initialized(nand)) { in nanddev_isbad()
28 entry = nanddev_bbt_pos_to_entry(nand, pos); in nanddev_isbad()
29 status = nanddev_bbt_get_block_status(nand, entry); in nanddev_isbad()
32 if (nand->ops->isbad(nand, pos)) in nanddev_isbad()
37 nanddev_bbt_set_block_status(nand, entry, status); in nanddev_isbad()
47 return nand->ops->isbad(nand, pos); in nanddev_isbad()
61 int nanddev_markbad(struct nand_device *nand, const struct nand_pos *pos) in nanddev_markbad() argument
63 struct mtd_info *mtd = nanddev_to_mtd(nand); in nanddev_markbad()
67 if (nanddev_isbad(nand, pos)) in nanddev_markbad()
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| D | bbt.c | 23 int nanddev_bbt_init(struct nand_device *nand) in nanddev_bbt_init() argument
26 unsigned int nblocks = nanddev_neraseblocks(nand); in nanddev_bbt_init()
30 nand->bbt.cache = kcalloc(nwords, sizeof(*nand->bbt.cache), in nanddev_bbt_init()
32 if (!nand->bbt.cache) in nanddev_bbt_init()
45 void nanddev_bbt_cleanup(struct nand_device *nand) in nanddev_bbt_cleanup() argument
47 kfree(nand->bbt.cache); in nanddev_bbt_cleanup()
60 int nanddev_bbt_update(struct nand_device *nand) in nanddev_bbt_update() argument
74 int nanddev_bbt_get_block_status(const struct nand_device *nand, in nanddev_bbt_get_block_status() argument
78 unsigned long *pos = nand->bbt.cache + in nanddev_bbt_get_block_status()
83 if (entry >= nanddev_neraseblocks(nand)) in nanddev_bbt_get_block_status()
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| /Linux-v5.4/drivers/mtd/nand/raw/ |
| D | meson_nand.c | 109 struct nand_chip nand; member
217 static struct meson_nfc_nand_chip *to_meson_nand(struct nand_chip *nand) in to_meson_nand() argument
219 return container_of(nand, struct meson_nfc_nand_chip, nand); in to_meson_nand()
222 static void meson_nfc_select_chip(struct nand_chip *nand, int chip) in meson_nfc_select_chip() argument
224 struct meson_nfc_nand_chip *meson_chip = to_meson_nand(nand); in meson_nfc_select_chip()
225 struct meson_nfc *nfc = nand_get_controller_data(nand); in meson_nfc_select_chip()
265 static void meson_nfc_cmd_access(struct nand_chip *nand, int raw, bool dir, in meson_nfc_cmd_access() argument
268 struct mtd_info *mtd = nand_to_mtd(nand); in meson_nfc_cmd_access()
270 struct meson_nfc_nand_chip *meson_chip = to_meson_nand(nand); in meson_nfc_cmd_access()
274 pagesize = nand->ecc.size; in meson_nfc_cmd_access()
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| D | sunxi_nand.c | 193 struct nand_chip nand; member
201 static inline struct sunxi_nand_chip *to_sunxi_nand(struct nand_chip *nand) in to_sunxi_nand() argument
203 return container_of(nand, struct sunxi_nand_chip, nand); in to_sunxi_nand()
405 static void sunxi_nfc_select_chip(struct nand_chip *nand, unsigned int cs) in sunxi_nfc_select_chip() argument
407 struct mtd_info *mtd = nand_to_mtd(nand); in sunxi_nfc_select_chip()
408 struct sunxi_nand_chip *sunxi_nand = to_sunxi_nand(nand); in sunxi_nfc_select_chip()
409 struct sunxi_nfc *nfc = to_sunxi_nfc(sunxi_nand->nand.controller); in sunxi_nfc_select_chip()
420 ctl |= NFC_CE_SEL(sel->cs) | NFC_EN | NFC_PAGE_SHIFT(nand->page_shift); in sunxi_nfc_select_chip()
436 static void sunxi_nfc_read_buf(struct nand_chip *nand, uint8_t *buf, int len) in sunxi_nfc_read_buf() argument
438 struct sunxi_nand_chip *sunxi_nand = to_sunxi_nand(nand); in sunxi_nfc_read_buf()
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| D | Makefile | 3 obj-$(CONFIG_MTD_RAW_NAND) += nand.o
5 nand-$(CONFIG_MTD_NAND_ECC_SW_BCH) += nand_bch.o
48 obj-$(CONFIG_MTD_NAND_GPMI_NAND) += gpmi-nand/
61 nand-objs := nand_base.o nand_legacy.o nand_bbt.o nand_timings.o nand_ids.o
62 nand-objs += nand_onfi.o
63 nand-objs += nand_jedec.o
64 nand-objs += nand_amd.o
65 nand-objs += nand_esmt.o
66 nand-objs += nand_hynix.o
67 nand-objs += nand_macronix.o
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| D | mtk_nand.c | 127 struct nand_chip nand; member
179 static inline struct mtk_nfc_nand_chip *to_mtk_nand(struct nand_chip *nand) in to_mtk_nand() argument
181 return container_of(nand, struct mtk_nfc_nand_chip, nand); in to_mtk_nand()
390 static void mtk_nfc_select_chip(struct nand_chip *nand, int chip) in mtk_nfc_select_chip() argument
392 struct mtk_nfc *nfc = nand_get_controller_data(nand); in mtk_nfc_select_chip()
393 struct mtk_nfc_nand_chip *mtk_nand = to_mtk_nand(nand); in mtk_nfc_select_chip()
398 mtk_nfc_hw_runtime_config(nand_to_mtd(nand)); in mtk_nfc_select_chip()
403 static int mtk_nfc_dev_ready(struct nand_chip *nand) in mtk_nfc_dev_ready() argument
405 struct mtk_nfc *nfc = nand_get_controller_data(nand); in mtk_nfc_dev_ready()
632 struct mtk_nfc_nand_chip *nand = to_mtk_nand(chip); in mtk_nfc_bad_mark_swap() local
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| /Linux-v5.4/Documentation/devicetree/bindings/mtd/ |
| D | marvell-nand.txt | 5 * "marvell,armada-8k-nand-controller"
6 * "marvell,armada370-nand-controller"
7 * "marvell,pxa3xx-nand-controller"
8 * "marvell,armada-8k-nand" (deprecated)
9 * "marvell,armada370-nand" (deprecated)
10 * "marvell,pxa3xx-nand" (deprecated)
23 "marvell,armada-8k-nand[-controller]" compatibles).
28 This property is only used with "marvell,pxa3xx-nand[-controller]"
31 This property is only used with "marvell,pxa3xx-nand[-controller]"
39 - nand-rb: see nand-controller.yaml (0-1).
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| D | samsung-s3c2410.txt | 5 "samsung,s3c2410-nand"
6 "samsung,s3c2412-nand"
7 "samsung,s3c2440-nand"
9 - #address-cells, #size-cells : see nand-controller.yaml
10 - clocks : phandle to the nand controller clock
11 - clock-names : must contain "nand"
14 Child nodes representing the available nand chips.
17 - nand-ecc-mode : see nand-controller.yaml
18 - nand-on-flash-bbt : see nand-controller.yaml
26 nand-controller@4e000000 {
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| D | denali-nand.txt | 5 "altr,socfpga-denali-nand" - for Altera SOCFPGA
6 "socionext,uniphier-denali-nand-v5a" - for Socionext UniPhier (v5a)
7 "socionext,uniphier-denali-nand-v5b" - for Socionext UniPhier (v5b)
15 - clock-names: should contain "nand", "nand_x", "ecc"
25 - nand-ecc-step-size: see nand-controller.yaml for details.
27 512 for "altr,socfpga-denali-nand"
28 1024 for "socionext,uniphier-denali-nand-v5a"
29 1024 for "socionext,uniphier-denali-nand-v5b"
30 - nand-ecc-strength: see nand-controller.yaml for details. Valid values are:
31 8, 15 for "altr,socfpga-denali-nand"
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| D | nvidia-tegra20-nand.txt | 5 - "nvidia,tegra20-nand"
11 - nand
15 - nand
25 - nand-ecc-mode: String, operation mode of the NAND ecc mode. Currently only
27 - nand-ecc-algo: string, algorithm of NAND ECC.
29 - nand-bus-width : See nand-controller.yaml
30 - nand-on-flash-bbt: See nand-controller.yaml
31 - nand-ecc-strength: integer representing the number of bits to correct
36 - nand-ecc-maximize: See nand-controller.yaml
37 - nand-is-boot-medium: Makes sure only ECC strengths supported by the boot ROM
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| D | mxc-nand.txt | 4 - compatible: "fsl,imxXX-nand"
7 - nand-bus-width: see nand-controller.yaml
8 - nand-ecc-mode: see nand-controller.yaml
9 - nand-on-flash-bbt: see nand-controller.yaml
13 nand@d8000000 {
14 compatible = "fsl,imx27-nand";
17 nand-bus-width = <8>;
18 nand-ecc-mode = "hw";
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| D | vf610-nfc.txt | 10 - #address-cells: shall be set to 1. Encode the nand CS.
23 Children nodes represent the available nand chips. Currently the driver can
28 - nand-bus-width: see nand-controller.yaml
29 - nand-ecc-mode: see nand-controller.yaml
32 - nand-ecc-strength: supported strengths are 24 and 32 bit (see nand-controller.yaml)
33 - nand-ecc-step-size: step size equals page size, currently only 2k pages are
35 - nand-on-flash-bbt: see nand-controller.yaml
39 nfc: nand@400e0000 {
50 nand@0 {
53 nand-bus-width = <8>;
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| D | stm32-fmc2-nand.txt | 27 - nand-on-flash-bbt: see nand-controller.yaml
28 - nand-ecc-strength: see nand-controller.yaml
29 - nand-ecc-step-size: see nand-controller.yaml
32 - nand-ecc-strength = <1>, nand-ecc-step-size = <512> (Hamming)
33 - nand-ecc-strength = <4>, nand-ecc-step-size = <512> (BCH4)
34 - nand-ecc-strength = <8>, nand-ecc-step-size = <512> (BCH8) (default)
38 fmc: nand-controller@58002000 {
55 nand@0 {
57 nand-on-flash-bbt;
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| D | hisi504-nand.txt | 10 - nand-bus-width: See nand-controller.yaml.
11 - nand-ecc-mode: Support none and hw ecc mode.
17 - nand-ecc-strength: Number of bits to correct per ECC step.
18 - nand-ecc-step-size: Number of data bytes covered by a single ECC step.
22 - nand-ecc-strength = <16>, nand-ecc-step-size = <1024>
29 nand: nand@4020000 {
33 nand-bus-width = <8>;
34 nand-ecc-mode = "hw";
35 nand-ecc-strength = <16>;
36 nand-ecc-step-size = <1024>;
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| D | qcom_nandc.txt | 5 * "qcom,ipq806x-nand" - for EBI2 NAND controller being used in IPQ806x
7 * "qcom,ipq4019-nand" - for QPIC NAND controller v1.4.0 being used in
9 * "qcom,ipq8074-nand" - for QPIC NAND controller v1.5.0 being used in
50 - nand-bus-width: see nand-controller.yaml
51 - nand-ecc-strength: see nand-controller.yaml. If not specified, then ECC strength will
61 nand-controller@1ac00000 {
62 compatible = "qcom,ipq806x-nand";
77 nand@0 {
80 nand-ecc-strength = <4>;
81 nand-bus-width = <8>;
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| D | tango-nand.txt | 5 - compatible: "sigma,smp8758-nand"
14 See Documentation/devicetree/bindings/mtd/nand-controller.yaml for generic bindings.
18 nandc: nand-controller@2c000 {
19 compatible = "sigma,smp8758-nand";
27 nand@0 {
29 nand-ecc-strength = <14>;
30 nand-ecc-step-size = <1024>;
33 nand@1 {
35 nand-ecc-strength = <14>;
36 nand-ecc-step-size = <1024>;
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| D | brcm,brcmnand.txt | 37 ranges. Should contain "nand" and (optionally)
38 "flash-dma" and/or "nand-cache".
43 May be "nand", if the SoC has the individual NAND
51 - clock-names : "nand" (required for the above clock)
52 - brcm,nand-has-wp : Some versions of this IP include a write-protect
74 * "brcm,nand-bcm63138"
77 - reg-names: (required) "nand-int-base"
79 * "brcm,nand-bcm6368"
80 - compatible: should contain "brcm,nand-bcm<soc>", "brcm,nand-bcm6368"
83 - reg-names: (required) "nand-int-base"
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| D | atmel-nand.txt | 12 "atmel,at91rm9200-nand-controller"
13 "atmel,at91sam9260-nand-controller"
14 "atmel,at91sam9261-nand-controller"
15 "atmel,at91sam9g45-nand-controller"
16 "atmel,sama5d3-nand-controller"
17 "microchip,sam9x60-nand-controller"
49 Documentation/devicetree/bindings/mtd/{common,nand}.txt also apply to the NAND
98 nand_controller: nand-controller {
99 compatible = "atmel,sama5d3-nand-controller";
107 nand@3 {
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| D | ingenic,jz4780-nand.txt | 10 * ingenic,jz4740-nand
11 * ingenic,jz4725b-nand
12 * ingenic,jz4780-nand
29 - nand-ecc-step-size: ECC block size in bytes.
30 - nand-ecc-strength: ECC strength (max number of correctable bits).
31 - nand-ecc-mode: String, operation mode of the NAND ecc mode. "hw" by default
32 - nand-on-flash-bbt: boolean to enable on flash bbt option, if not present false
44 nandc: nand-controller@1 {
45 compatible = "ingenic,jz4780-nand";
53 nand@1 {
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| /Linux-v5.4/drivers/mtd/nand/spi/ |
| D | core.c | 52 struct nand_device *nand = spinand_to_nand(spinand); in spinand_get_cfg() local
55 spinand->cur_target >= nand->memorg.ntargets)) in spinand_get_cfg()
64 struct nand_device *nand = spinand_to_nand(spinand); in spinand_set_cfg() local
68 spinand->cur_target >= nand->memorg.ntargets)) in spinand_set_cfg()
118 struct nand_device *nand = spinand_to_nand(spinand); in spinand_select_target() local
121 if (WARN_ON(target >= nand->memorg.ntargets)) in spinand_select_target()
127 if (nand->memorg.ntargets == 1) { in spinand_select_target()
142 struct nand_device *nand = spinand_to_nand(spinand); in spinand_init_cfg_cache() local
148 nand->memorg.ntargets, in spinand_init_cfg_cache()
154 for (target = 0; target < nand->memorg.ntargets; target++) { in spinand_init_cfg_cache()
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| /Linux-v5.4/drivers/mtd/nand/raw/atmel/ |
| D | nand-controller.c | 201 struct atmel_nand *nand);
203 int (*setup_data_interface)(struct atmel_nand *nand, int csline,
419 struct atmel_nand *nand = to_atmel_nand(chip); in atmel_nand_read_byte() local
421 return ioread8(nand->activecs->io.virt); in atmel_nand_read_byte()
426 struct atmel_nand *nand = to_atmel_nand(chip); in atmel_nand_write_byte() local
429 iowrite16(byte | (byte << 8), nand->activecs->io.virt); in atmel_nand_write_byte()
431 iowrite8(byte, nand->activecs->io.virt); in atmel_nand_write_byte()
436 struct atmel_nand *nand = to_atmel_nand(chip); in atmel_nand_read_buf() local
448 !atmel_nand_dma_transfer(nc, buf, nand->activecs->io.dma, len, in atmel_nand_read_buf()
453 ioread16_rep(nand->activecs->io.virt, buf, len / 2); in atmel_nand_read_buf()
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| /Linux-v5.4/drivers/mtd/nand/raw/ingenic/ |
| D | ingenic_nand_drv.c | 147 struct ingenic_nand *nand = to_ingenic_nand(nand_to_mtd(chip)); in ingenic_nand_select_chip() local
148 struct ingenic_nfc *nfc = to_ingenic_nfc(nand->chip.controller); in ingenic_nand_select_chip()
163 struct ingenic_nand *nand = to_ingenic_nand(nand_to_mtd(chip)); in ingenic_nand_cmd_ctrl() local
164 struct ingenic_nfc *nfc = to_ingenic_nfc(nand->chip.controller); in ingenic_nand_cmd_ctrl()
185 struct ingenic_nand *nand = to_ingenic_nand(nand_to_mtd(chip)); in ingenic_nand_dev_ready() local
187 return !gpiod_get_value_cansleep(nand->busy_gpio); in ingenic_nand_dev_ready()
192 struct ingenic_nand *nand = to_ingenic_nand(nand_to_mtd(chip)); in ingenic_nand_ecc_hwctl() local
194 nand->reading = (mode == NAND_ECC_READ); in ingenic_nand_ecc_hwctl()
200 struct ingenic_nand *nand = to_ingenic_nand(nand_to_mtd(chip)); in ingenic_nand_ecc_calculate() local
201 struct ingenic_nfc *nfc = to_ingenic_nfc(nand->chip.controller); in ingenic_nand_ecc_calculate()
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| /Linux-v5.4/Documentation/devicetree/bindings/pinctrl/ |
| D | marvell,kirkwood-pinctrl.txt | 24 mpp0 0 gpio, nand(io2), spi(cs)
25 mpp1 1 gpo, nand(io3), spi(mosi)
26 mpp2 2 gpo, nand(io4), spi(sck)
27 mpp3 3 gpo, nand(io5), spi(miso)
28 mpp4 4 gpio, nand(io6), uart0(rxd), ptp(clk)
29 mpp5 5 gpo, nand(io7), uart0(txd), ptp(trig)
45 mpp18 18 gpo, nand(io0)
46 mpp19 19 gpo, nand(io1)
62 mpp0 0 gpio, nand(io2), spi(cs)
63 mpp1 1 gpo, nand(io3), spi(mosi)
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| D | lantiq,pinctrl-xway.txt | 51 ebu wait, nand ale, nand cs1, nand cle, spi, spi_cs1, spi_cs2, spi_cs3,
62 ebu clk, ebu cs1, ebu wait, nand ale, nand cs1, nand cle, nand rdy,
63 nand rd, spi, spi_cs1, spi_cs2, spi_cs3, spi_cs4, spi_cs5, spi_cs6,
83 ebu wait, nand ale, nand cs1, nand cle, spi_di, spi_do, spi_clk, spi_cs1,
94 ebu cs1, ebu wait, nand ale, nand cs1, nand cle, nand rdy, nand rd,
106 ebu cs1, ebu wait, nand ale, nand cs1, nand cle, nand rdy, nand rd,
120 exin0, exin1, exin2, exin4, nand ale, nand cs0, nand cs1, nand cle,
121 nand rdy, nand rd, nand_d0, nand_d1, nand_d2, nand_d3, nand_d4, nand_d5,
122 nand_d6, nand_d7, nand_d1, nand wr, nand wp, nand se, spi_di, spi_do,
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