Searched refs:n_phy (Results 1 – 15 of 15) sorted by relevance
82 sas_phy->enabled = (phy_id < mvi->chip->n_phy) ? 1 : 0; in mvs_phy_init()223 for (i = 0; i < mvi->chip->n_phy; i++) { in mvs_alloc()366 ((struct mvs_prv_info *)sha->lldd_ha)->n_phy = mvi->chip->n_phy; in mvs_pci_alloc()411 phy_nr = core_nr * chip_info->n_phy; in mvs_prep_sas_ha_init()454 for (i = 0; i < chip_info->n_phy; i++) { in mvs_post_sas_ha_init()455 sha->sas_phy[j * chip_info->n_phy + i] = in mvs_post_sas_ha_init()457 sha->sas_port[j * chip_info->n_phy + i] = in mvs_post_sas_ha_init()467 sha->num_phys = nr_core * chip_info->n_phy; in mvs_post_sas_ha_init()483 for (i = 0; i < mvi->chip->n_phy; i++) { in mvs_init_sas_add()
82 hi = j/((struct mvs_prv_info *)sha->lldd_ha)->n_phy; in mvs_find_dev_mvi()107 phyno[n] = (j >= mvi->chip->n_phy) ? in mvs_find_dev_phyno()108 (j - mvi->chip->n_phy) : j; in mvs_find_dev_phyno()176 hi = i/((struct mvs_prv_info *)sha->lldd_ha)->n_phy; in mvs_phy_control()261 mv_dprintk("phy %d byte dmaded.\n", i + mvi->id * mvi->chip->n_phy); in mvs_bytes_dmaed()281 for (i = 0; i < mvi->chip->n_phy; ++i) in mvs_scan_start()1026 i + mvi->id * mvi->chip->n_phy; in mvs_update_phyinfo()1067 i + mvi->id * mvi->chip->n_phy, phy->att_dev_info); in mvs_update_phyinfo()1069 i + mvi->id * mvi->chip->n_phy, phy->att_dev_sas_addr); in mvs_update_phyinfo()1091 hi = i/((struct mvs_prv_info *)sas_ha->lldd_ha)->n_phy; in mvs_port_notify_formed()[all …]
34 if (mvi->chip->n_phy <= MVS_SOC_PORTS) in mvs_64xx_enable_xmt()56 for (i = 0; i < mvi->chip->n_phy; i++) { in mvs_64xx_phy_hacks()322 for (i = 0; i < mvi->chip->n_phy; i++) { in mvs_64xx_init()345 for (i = 0; i < mvi->chip->n_phy; i++) { in mvs_64xx_init()
164 u32 n_phy; member402 u8 n_phy; member
190 for (i = 0; i < mvi->chip->n_phy; i++) { in mvs_int_full()
460 for (i = 0; i < mvi->chip->n_phy; i++) { in mvs_94xx_init()486 for (i = 0; i < mvi->chip->n_phy; i++) { in mvs_94xx_init()832 port_id + mvi->id * mvi->chip->n_phy, i, id_frame[i]); in mvs_94xx_get_att_identify_frame()
125 sas_phy->enabled = (phy_id < pm8001_ha->chip->n_phy) ? 1 : 0; in pm8001_phy_init()251 pm8001_ha->chip->n_phy)); in pm8001_alloc()252 for (i = 0; i < pm8001_ha->chip->n_phy; i++) { in pm8001_alloc()526 phy_nr = chip_info->n_phy; in pm8001_prep_sas_ha_init()572 for (i = 0; i < chip_info->n_phy; i++) { in pm8001_post_sas_ha_init()583 sha->num_phys = chip_info->n_phy; in pm8001_post_sas_ha_init()660 for (i = 0; i < pm8001_ha->chip->n_phy; i++) { in pm8001_init_sas_add()671 for (i = 0; i < pm8001_ha->chip->n_phy; i++) { in pm8001_init_sas_add()826 for (i = 0; i < pm8001_ha->chip->n_phy; i++) { in pm8001_set_phy_settings_ven_117c_12G()1241 for (i = 0; i < pm8001_ha->chip->n_phy; i++) { in pm8001_pci_resume()
237 u32 n_phy; member
272 for (i = 0; i < pm8001_ha->chip->n_phy; ++i) in pm8001_scan_start()
3350 for (i = 0; i < pm8001_ha->chip->n_phy; i++) { in mpi_hw_event()4682 for (i = 0; i < pm8001_ha->chip->n_phy; i++) { in pm8001_set_phy_profile()
563 for (i = 0; i < hisi_hba->n_phy; i++) { in reset_hw_v1_hw()572 for (i = 0; i < hisi_hba->n_phy; i++) { in reset_hw_v1_hw()683 for (i = 0; i < hisi_hba->n_phy; i++) { in init_reg_v1_hw()799 for (i = 0; i < hisi_hba->n_phy; i++) { in start_phys_v1_hw()810 for (i = 0; i < hisi_hba->n_phy; i++) { in phys_init_v1_hw()853 for (i = 0; i < hisi_hba->n_phy; i++) in get_wideport_bitmap_v1_hw()1642 for (i = 0; i < hisi_hba->n_phy; i++) { in interrupt_init_v1_hw()1664 idx = hisi_hba->n_phy * HISI_SAS_PHY_INT_NR; in interrupt_init_v1_hw()1682 idx = (hisi_hba->n_phy * HISI_SAS_PHY_INT_NR) + hisi_hba->queue_count; in interrupt_init_v1_hw()1710 for (i = 0; i < hisi_hba->n_phy; i++) { in interrupt_openall_v1_hw()
1019 if (hisi_hba->n_phy == 9) in reset_hw_v2_hw()1027 for (i = 0; i < hisi_hba->n_phy; i++) { in reset_hw_v2_hw()1036 for (i = 0; i < hisi_hba->n_phy; i++) { in reset_hw_v2_hw()1118 hisi_hba->reject_stp_links_msk = (1 << hisi_hba->n_phy) - 1; in phys_reject_stp_links_v2_hw()1119 for (phy_no = 0; phy_no < hisi_hba->n_phy; phy_no++) { in phys_reject_stp_links_v2_hw()1134 for (phy_no = 0; phy_no < hisi_hba->n_phy; phy_no++) { in phys_try_accept_stp_links_v2_hw()1224 for (i = 0; i < hisi_hba->n_phy; i++) { in init_reg_v2_hw()1329 for (i = 0; i < hisi_hba->n_phy; i++) { in link_timeout_enable_link()1351 for (i = 0; i < hisi_hba->n_phy && reg_val; i++) { in link_timeout_disable_link()1577 for (i = 0; i < hisi_hba->n_phy; i++) { in phys_init_v2_hw()[all …]
152 for (phy_no = 0; phy_no < hisi_hba->n_phy; phy_no++) in hisi_sas_stop_phys()919 sas_phy->enabled = (phy_no < hisi_hba->n_phy) ? 1 : 0; in hisi_sas_phy_init()1401 for (phy_no = 0; phy_no < hisi_hba->n_phy; phy_no++) { in hisi_sas_rescan_topology()1498 for (port_no = 0; port_no < hisi_hba->n_phy; port_no++) { in hisi_sas_terminate_stp_reject()2282 s = sizeof(struct hisi_sas_initial_fis) * hisi_hba->n_phy; in hisi_sas_init_mem()2306 for (i = 0; i < hisi_hba->n_phy; i++) { in hisi_sas_alloc()2447 for (i = 0; i < hisi_hba->n_phy; i++) { in hisi_sas_free()2528 if (device_property_read_u32(dev, "phy-count", &hisi_hba->n_phy)) { in hisi_sas_get_fw_info()2622 phy_nr = port_nr = hisi_hba->n_phy; in hisi_sas_probe()2652 sha->num_phys = hisi_hba->n_phy; in hisi_sas_probe()[all …]
593 for (i = 0; i < hisi_hba->n_phy; i++) { in init_reg_v3_hw()984 for (i = 0; i < hisi_hba->n_phy; i++) { in phys_init_v3_hw()1014 for (i = 0; i < hisi_hba->n_phy; i++) in get_wideport_bitmap_v3_hw()2506 for (i = 0; i < hisi_hba->n_phy; i++) { in interrupt_disable_v3_hw()2577 if ((reg_index + reg_count) > ((hisi_hba->n_phy + 3) / 4)) { in write_gpio_v3_hw()3198 phy_nr = port_nr = hisi_hba->n_phy; in hisi_sas_v3_probe()3224 sha->num_phys = hisi_hba->n_phy; in hisi_sas_v3_probe()3226 for (i = 0; i < hisi_hba->n_phy; i++) { in hisi_sas_v3_probe()
343 int n_phy; member
